Browse Prior Art Database

Gapless Tape Support

IP.com Disclosure Number: IPCOM000115663D
Original Publication Date: 1995-Jun-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 64K

Publishing Venue

IBM

Related People

Emberley, C: AUTHOR [+3]

Abstract

This describes a method for reading data previously recorded on tape media without inter-record gaps. The technique uses a buffer switching scheme that uses a Program-Controlled Interruption (PCI) function as well as a new Application Programming Interface (API). This is important because it provides an operating system with the ability to process data generated from seismic applications, for example. The following describes how the gapless tape reading takes place. 1. The application issues the gapless tape system call to setup for gapless tape reading. The system generates two internal buffers of data chained CCWs based on the size of the two buffers that the user specified in the system call. The last CCW in buffer 1's chain of CCWs is set to NOOP (no operation).

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Gapless Tape Support

      This describes a method for reading data previously recorded on
tape media without inter-record gaps.  The technique uses a buffer
switching scheme that uses a Program-Controlled Interruption (PCI)
function as well as a new Application Programming Interface (API).
This is important because it provides an operating system with the
ability to process data generated from seismic applications, for
example.  The following describes how the gapless tape reading takes
place.
  1.  The application issues the gapless tape system call to setup
for
       gapless tape reading.  The system generates two internal
buffers
       of data chained CCWs based on the size of the two buffers that
       the user specified in the system call.  The last CCW in buffer
       1's chain of CCWs is set to NOOP (no operation).  The last CCW
in
       buffer 2's chain of CCWs is set to Transfer In Channel (TIC)
       pointing to the beginning of buffer 1's CCWs.  The PCI bit is
       turned on in the second to last CCW in each chain.
  2.  The application issues a read system call to start reading into
       its buffer 1.  The device driver changes the last CCW in
buffer
       1's CCW chain to a TIC, pointing to buffer 2's CCW chain.  The
       last CCW in buffer 2's chain of CCW's is set to a NOOP.  The
       system then starts the channel program.
  3.  When the PCI interrupt comes in the system gives control back
to
       the application....