Browse Prior Art Database

Expedited Link Layering in a Simplex Switch

IP.com Disclosure Number: IPCOM000115664D
Original Publication Date: 1995-Jun-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 217K

Publishing Venue

IBM

Related People

Andrade, RJ: AUTHOR [+5]

Abstract

Disclosed is a method, within a simplex switch, for transmitting both data sent from a calling system to a called system (IB data) and link layer control messages (OB messages), such as acknowledgement messages transferred by means of a packet router function of the switch, along a single serial link to a subsystem connected to the switch. Space for the transmission of OB messages is provided by a number of idle characters placed in the IB data. An OB message is transmitted when it is ready, without waiting for the next group of idle characters, as a portion of the IB data is stored in a shift register, from which IB data is subsequently read. When the next group of idle characters is read into the shift register, the transmission of IB data without the delay provided by the shift register is resumed.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 28% of the total text.

Expedited Link Layering in a Simplex Switch

      Disclosed is a method, within a simplex switch, for
transmitting both data sent from a calling system to a called system
(IB data) and link layer control messages (OB messages), such as
acknowledgement messages transferred by means of a packet router
function of the switch, along a single serial link to a subsystem
connected to the switch.  Space for the transmission of OB messages
is provided by a number of idle characters placed in the IB data.  An
OB message is transmitted when it is ready, without waiting for the
next group of idle characters, as a portion of the IB data is stored
in a shift register, from which IB data is subsequently read.  When
the next group of idle characters is read into the shift register,
the transmission of IB data without the delay provided by the shift
register is resumed.

      As shown in Fig. 1, a serial switch 10 is a hardware device
used to provide high-speed data communications among a group of
subsystems 12, physically attached to the switch 10 by an individual
pair of transmit and receive wires 14.  Subsystems 12 communicate
through the switch 10 by transferring data within connections, which
are data paths established by the switch, as the transmit wire of a
source, or calling subsystem, is logically connected to the receive
wire of a destination, or called subsystem.  Subsystems request
connections from the switch by sending serially encoded "Connect
Request" and "Disconnect Request" link layer control messages.

      Unlike serial switch 10, conventional switch designs operate on
the basis of full duplex connectivity, with the switch logically
connecting the transmit wire of the calling subsystem to the receive
wire of the called system, as the transmit wire of the called
subsystem is simultaneously connected to the receive wire of the
calling subsystem.  In this way, each subsystem has a communication
path to the other for the duration of the connection.  However, data
transfer operations in a computer network are typically
unidirectional, with data being sent by a calling subsystem to a
called subsystem, while only an occasional link layer data
acknowledgement message is sent in return.  This under-utilization of
the reverse data path in a full duplex connection results in wasting
nearly half the potential data throughput capacity of the switch.

      The wasted throughput capacity of a full duplex switch design
can be recovered if a switch is instead designed to operate on the
basis of simplex connectivity.  In a simplex connection, the switch
logically connects the transmit wire of the calling subsystem to the
receive wire of the called subsystem.  However, unlike a full duplex
connection, a simplex connection does not provide a reverse path for
returning data acknowledgement messages.  Instead, the reverse path
remains available for connections from other subsystems.

      Since a simplex switch does not  allo...