Browse Prior Art Database

Initialization of Cascade Serial Simplex Switch Supporting Logical Addresses

IP.com Disclosure Number: IPCOM000115775D
Original Publication Date: 1995-Jun-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 8 page(s) / 339K

Publishing Venue

IBM

Related People

Andrade, RJ: AUTHOR [+5]

Abstract

Disclosed is an installation sequence implementing logical subsystem addressing in a cascade serial simplex switch supporting the interconnection of up to sixteen subsystems connected to the switch through ports. One of these subsystems may be another simplex switch, connected in a cascade fashion. Before initialization, the simplex switch does not know what types of subsystems are connected, or which subsystems may be reconfigured to different types.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 19% of the total text.

Initialization of Cascade Serial Simplex Switch Supporting Logical
Addresses

      Disclosed is an installation sequence implementing logical
subsystem addressing in a cascade serial simplex switch supporting
the interconnection of up to sixteen subsystems connected to the
switch through ports.  One of these subsystems may be another simplex
switch, connected in a cascade fashion.  Before initialization, the
simplex switch does not know what types of subsystems are connected,
or which subsystems may be reconfigured to different types.

      As shown in Fig. 1, a serial switch 10 is a hardware device
used to provide high-speed serialized data communications among a
group of attached subsystems 12, being physically attached to each
subsystem 12 through an individual pair of transmit and receive wires
14.  The subsystems 12 communicate with each other through switch 10
by transferring data within connections.  Each connection is a data
path established by switch 10 to connect the transmit wire of a
source, or "calling" subsystem to the receive wire of a destination,
or "called" subsystem.  Subsystems request connections from the
switch by sending serially encoded "Connect Request" and "Disconnect
Request" link layer control messages.

      A serial crossbar switch provides an internal crosspoint
switching fabric to eliminate connection blocking.  In a non-blocked
switch, connections between pairs of subsystems can exist
concurrently.  This concurrence, which provides significant
performance advantages of single-threaded interconnections, such as
serial ring networks, is one of the principle reasons why switching
is preferred in high- speed interconnection applications.

      Conventional switch designs operate on the basis of full duplex
connectivity, in which the switch logically connects the transmit
wire of the calling subsystem to the receive wire of the called
subsystem, while simultaneously logically connecting the transmit
wire of the called subsystem to the receive wire of the calling
subsystem.  In this way, each subsystem has a communication path to
the other for the duration of the connection.  However, since data
transfer operations in a computer network are normally
unidirectional, with data being sent from a calling subsystem to a
called subsystem as only an occasional link layer data
acknowledgement message is sent in return, underutilization of the
reverse data path results in wasting nearly half the potential data
throughput capacity of the switch.

      This wasted throughput capacity is recovered by designing the
switch to operate on the basis of simplex connectivity.  In a simplex
construction, a switch logically connects the transmit wire of the
calling subsystem to the receive wire of the called subsystem.  Thus,
while the simplex connection does not provide a reverse path for
returning data acknowledgement messages, the reverse path remains
available for connections from other subsystems...