Browse Prior Art Database

Compact Fusible Chip Identification Scheme

IP.com Disclosure Number: IPCOM000115999D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Hiltebeitel, N: AUTHOR [+2]

Abstract

A simplified scheme is described for decoding the status of each fuse on a fuse-programmable semiconductor memory chip. Instead of using a shift register for reading out the status of the fuses, this scheme employs a hierarchical tree of devices driven by on-chip addresses for decoding purposes. Compatibility with two alternative address sources is described.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 74% of the total text.

Compact Fusible Chip Identification Scheme

      A simplified scheme is described for decoding the status of
each fuse on a fuse-programmable semiconductor memory chip.  Instead
of using a shift register for reading out the status of the fuses,
this scheme employs a hierarchical tree of devices driven by on-chip
addresses for decoding purposes.  Compatibility with two alternative
address sources is described.

      Fig. 1 illustrates one of the architectures for fuse
IDentification (ID) readout.  The PRIMARY ADDRESS is used to select
the fuse ID mode of operation and preset the SERIAL PORT COUNTER.
The FUSE ID ENABLE powers up the FUSE DECODE TREE and turns on the
DRIVER.  Each pulse of the serial clock (SC) will increment the
SERIAL PORT COUNTER and the SERIAL COUNTER ADDRESS selects each fuse
sequentially.  Serial data corresponding to fuse status will appear
at the OUTPUT PAD.

      An example of a portion of the FUSE DECODE TREE is shown in
Fig. 2.  Each node in the tree (such as N1) has a pre-charge PFET
device.  When the TEST MODE is not activated, TM is low, PRE-CHARGE
is off, and the DRIVER is tri-stated so that no power is dissipated.
When the TEST MODE is activated, TM is high, a normal RAS cycle is
performed, and the SERIAL COUNTER ADDRESS input appears on the Z
lines.  In Fig. 2, each Z line address will select only one fuse.  N1
is discharged if the fuse is not blown.  N1 will stay high if the
fuse is blown.  The pre-charge PFET devices...