Browse Prior Art Database

Rules-Based Consistency Checker

IP.com Disclosure Number: IPCOM000116035D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 88K

Publishing Venue

IBM

Related People

Golla, RG: AUTHOR [+2]

Abstract

Consistency checkers are often employed to verify the integrity of a given processor design. Consistency checkers insure that the proper connections are made between internal components of a design in order to realize a functional chip. Some issues that have been verified by consistency checkers in the past include: 1. clock connections between clock regenerators and registers 2. priority encoders are properly connected to pass-gate muxes 3. charge-sharing issues (e.g., tristate busses feeding pass-gate muxes) 4. global control signals properly hooked up on chip

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Rules-Based Consistency Checker

      Consistency checkers are often employed to verify the integrity
of a given processor design.  Consistency checkers insure that the
proper connections are made between internal components of a design
in order to realize a functional chip.  Some issues that have been
verified by consistency checkers in the past include:
  1.  clock connections between clock regenerators and registers
  2.  priority encoders are properly connected to pass-gate muxes
  3.  charge-sharing issues (e.g., tristate busses feeding pass-gate
       muxes)
  4.  global control signals properly hooked up on chip

      The exact nature of a design check within a consistency checker
is process dependent.  In order to check that a specific clock must
be connected to specific pin on a register, one must know exactly
which clock and which register cell are being referenced.  Moreover,
a design check is also methodology dependent.  In order to verify the
clocking interconnection of a design, one must understand the
clocking methodology decided upon at the onset of the project.
Design checks change between chip designs precisely because they are
process and methodology dependent.

      A rules-based consistency checker (CCHECK) has been developed.
CCHECK is portable between design projects.  The design checks are
NOT embedded into the program itself.  Instead, the design checks are
specified as a set of rules that are put into a rules file.  These
rules can be easily referenced and changed by the designer.  CCHECK
reads these rules and applies the design checks contained within to
the design at hand.

      The CCHECK program is written in C. CCHECK loads in the network
of a given chip design, reads in the user specified rules file and
then applies these rules to the specified network.  If any of the
design rules are not satisified, CCHECK reports this as an error to
the user.

      CCHECK supports 6 basics rules in performing consistency
checks.  An example rules file and explanations of each rule is given
below:
  SIG    JTC_TEST_PULLDOWN   Z0  TMNA
  PIN    TMOC  10            S0  TMNC
  NOSIG  ZZZ_XREN?           ?   TMNA
  NOPIN  TMSC  ?             ?   TMUA
  PINCONF TMUX  10  Y0       TPRB   0
  PINCONF TMUA  10  Y0       TPRB   1
  SIGCONF JT2_JTAGSEL       A1  TMKM    0
  SIGCONF ZERO              A1  TMKM    1
  o  SIG Rule: The SIG rule insures that a signal is connected to a
      specified...