Browse Prior Art Database

Low Power Scheme for Fuse Latches

IP.com Disclosure Number: IPCOM000116041D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 46K

Publishing Venue

IBM

Related People

Litten, SM: AUTHOR [+2]

Abstract

Previous DRAM and other circuits using fuse latches exhibit high currents between VDD and ground through unblown wordline and bitline fuses during the fuse power-up interval. A modified fuse latch is described that uses a master fuse latch output signal to inhibit current between VDD and ground when the master fuse is not blown.

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Low Power Scheme for Fuse Latches

      Previous DRAM and other circuits using fuse latches exhibit
high currents between VDD and ground through unblown wordline and
bitline fuses during the fuse power-up interval.  A modified fuse
latch is described that uses a master fuse latch output signal to
inhibit current between VDD and ground when the master fuse is not
blown.

      The Figure represents a MASTER FUSE LATCH combined with one of
many wordline and bitline FUSE LATCHES.  FPUN is used to reset all
fuse latches.  When FPUN is low for a short interval, PFET T0M is
turned on, and node NET1M is pulled toward VDD by a heavy current
through T0M.  Power dissipation in the MASTER FUSE LATCH is high
during the reset interval, but the number of MASTER FUSE LATCHES is
small compared to the number of wordline and bitline FUSE LATCHES.

      Each wordline and bitline FUSE LATCH in the Figure is similar
to the MASTER FUSE LATCH, except that PFET T2 has been added in
series with PFET T0 in each FUSE LATCH.  Each set of redundant
wordline and bitline fuse circuits contain one FUSE for each address,
plus one MASTER FUSE.  If the redundancy has been implemented for a
particular redundant line, the associated MASTER FUSE is blown.  When
the MASTER FUSE is blown, NET1M is pulled high, FMASTER is low, T2 is
on, and each FUSE LATCH driven by FMASTER allows NET1 to be pulled
toward VDD through T0 as in the MASTER LATCH.  When the MASTER FUSE
is not blown, NET1M is low,...