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Sync Pattern Write Method for Serial Port Partial Response Maximum Likelihood Channel

IP.com Disclosure Number: IPCOM000116067D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Yasuda, T: AUTHOR

Abstract

This article describes a Sync Pattern write method in serial interface Partial Response Maximum Likelihood (PRML) Channel with its length controlled by Hard Disk Controller (HDC). Sync Pattern is used to lock internal VCO into read data at the starting of read operation. This method enables us to generate Bit Sync Pattern and Byte Sync Pattern from Sync Pattern and connect them correctly before writing data on the disk.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Sync Pattern Write Method for Serial Port Partial Response Maximum
Likelihood Channel

      This article describes a Sync Pattern write method in serial
interface Partial Response Maximum Likelihood (PRML) Channel with its
length controlled by Hard Disk Controller (HDC).  Sync Pattern is
used to lock internal VCO into read data at the starting of read
operation.  This method enables us to generate Bit Sync Pattern and
Byte Sync Pattern from Sync Pattern and connect them correctly before
writing data on the disk.

      Most of the PRML Channels use 8/9 bit Encoder and 9/8 bit
Decoder.  In order to use these Encoder and Decoder, Channel must
know byte block in writing and reading the data.  Bit Sync Pattern is
used for Read VCO to lock into the data.  Byte Sync Pattern is used
to discriminate the boundary of byte block.  Fig. 1 shows the Bit
Sync Pattern, Byte Sync Pattern and their converted data with 8/9
Encoder.  The encoded Bit Sync Pattern has 9 bits with all '1's.  As
for the encoded Byte Sync Pattern, it has one '0' surrounded by four
consecutive '1's for both side.  The '0' in the center is used to
find byte boundary with pattern matching.

      Fig. 2 shows the circuit for implementing this method.  In
general, there is a data protocol between HDC and Channel that "Data
must be all '0's during Sync Pattern and it must be '1' at the
beginning of random data."  According to the protocol, this circuit
masks the first several bytes with all '0's to make Bit Sync Pattern
with Mask Gate (A).  After the mask is released the rest of
continuous '0's become Byte Sync Pattern.  HDC can specify the Bit
Sync Pattern length by setting Programmable Counter (B).  HDC can
decide Byte Sync Pattern Length by changing the number of continuous
'0's input from Serial Data Input.  To encode the data with 8/9
Encoder the data is converted into 8 bits parallel styl...