Browse Prior Art Database

Short-Circuit-Protected Single Chip Noninverting Buffer Driver

IP.com Disclosure Number: IPCOM000116069D
Original Publication Date: 1995-Jul-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 44K

Publishing Venue

IBM

Related People

Allen, JM: AUTHOR

Abstract

The disclosed circuit is a short-circuit-protected single-chip noninverting buffer driver. It utilizes only a 7400 quad-nand chip and three low-cost components.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 54% of the total text.

Short-Circuit-Protected Single Chip Noninverting Buffer Driver

      The disclosed circuit is a short-circuit-protected single-chip
noninverting buffer driver.  It utilizes only a 7400 quad-nand chip
and three low-cost components.

      The key idea in the circuit is to consider a low short as a low
logic signal.  The circuit functions as follows.  A is the input and
B is the output.  Z works as a control for the overall function of
the circuit.  When Z=1, the circuit functions as a buffer (B=A).
When Z=0, the circuit will drive B low when A is high.  Z=0 happens
when the circuit sees that B is low when it should be high (shorted
B).  When the circuit has this shorted state, the circuit stops
driving B high, protecting the gate that drives B.  The R1C1 delay is
needed to give time for B to respond after A toggles high (A=1
transition).  R2 is used to limit the current until the circuit stops
driving B high when B has a short (see the figure).

The following is a logic-flow table to show how the circuit
dynamically functions:
  Stable state               State
  or transition           A W B X Y Z
  -------------           -----------
  Power-up                x x x x x x
                          0 x x x x x    <- A=0 to set correct state
                          0 1 x x 1 x
                          0 1 0 x 0 x
        ...