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Manufacturing Test Mode for the Peripheral Component Interconnect Bus

IP.com Disclosure Number: IPCOM000116093D
Original Publication Date: 1995-Aug-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 137K

Publishing Venue

IBM

Related People

Cohen, A: AUTHOR [+4]

Abstract

Disclosed is a technique called Manufacturing Test Mode (MTM) which allows for simple, inexpensive test fixtures to be used to verify the functionality of large numbers of Peripheral Component Interconnect (PCI) add-in boards in an manufacturing burn-in chamber. The technique simplifies the handshaking required over the PCI bus to initiate and monitor the test, and takes advantage of circuitry and/or microcode on the add-in board to allow it to verify its own function through a "self test" operation. The MTM self test operation is invoked by applying an "invalid" signal sequence to the add-in board's PCI bus connector. Once in the MTM state, the add-in board's PCI interface signals assume a new function to allow the results of the self test to be easily monitored.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 45% of the total text.

Manufacturing Test Mode for the Peripheral Component Interconnect Bus

      Disclosed is a technique called Manufacturing Test Mode (MTM)
which allows for simple, inexpensive test fixtures to be used to
verify the functionality of large numbers of Peripheral Component
Interconnect (PCI) add-in boards in an manufacturing burn-in chamber.
The technique simplifies the handshaking required over the PCI bus to
initiate and monitor the test, and takes advantage of circuitry
and/or microcode on the add-in board to allow it to verify its own
function through a "self test" operation.  The MTM self test
operation is invoked by applying an "invalid" signal sequence to the
add-in board's PCI bus connector.  Once in the MTM state, the add-in
board's PCI interface signals assume a new function to allow the
results of the self test to be easily monitored.

      Mechanically the "MTM Test Fixture" consists of a PCI connector
socket equivalent to those found on the system board of a PCI
computer system.  The PCI add-in boards are plugged into the MTM Test
Fixture and receive power and a valid PCI CLK signal through the
connector.  The MTM Test Fixture asserts the PCI reset (RST#) signal
to initialize the hardware on the add-in board.

      To invoke the self test, the MTM Test Fixture toggles the PCI
TRDY# and DEVSEL# signals on the add-in board's PCI bus connector in
a sequence that is normally "invalid" on the PCI bus.  The add-in
board is specifically designed to detect the invalid signal sequence.
Upon detecting this sequence, the add-in board enters a special
Manufacturing Test Mode in which it performs a self test as a stand
alone entity without the need for stimulus that would normally be
provided by circuitry on a PCI system board.  The self test may
consist of diagnostic code executed by a microprocessor on the add-in
board, or a Built In Self Test (BIST) mechanism that is imbedded into
the add-in board's VLSI circuitry.

      If the self test completes successfully, the add-in board will
assert the PCI interrupt signal (INTA#) to indicate the test was
successful.  If the add-in board fails to assert the interrupt signal
within a specified time, the test is assumed to be unsuccessful.  If
this occurs, the MTM Test Fixture can cause the add-in board to drive
an error code onto the PCI data bus (AD(31:0)) by asserting the PCI
GNT# signal on the PCI bus connector.  The error code will then be
logged by the MTM Test Fixture for later diagnosis of the problem.

      The entire test procedure requires that only a few signals on
the PCI bus connector be toggled.  All other signals on the PCI bus
connector are either terminated in a static state or left
unconnected.  This allows the burn-in test fixture to consist of
simple logic rather than a full function device that has to toggle 50
or more signals on the PCI bus.  Expense and complexity are
minimized.

      The following provides a step by step description of the...