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Thin Film Transistor Patterning Method

IP.com Disclosure Number: IPCOM000116105D
Original Publication Date: 1995-Aug-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 63K

Publishing Venue

IBM

Related People

Furuta, K: AUTHOR [+3]

Abstract

Disclosed is a Thin Film Transistor (TFT) structure with source and drain electrode self-aligned to etching stopper edge shape. With this structure, on current of TFT increases due to the reduction of channel length. As the uniformity of the capacitance between gate and source electrode is improved, the area of storage capacitor decreases and aperture ratio of TFT panel increases.

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Thin Film Transistor Patterning Method

      Disclosed is a Thin Film Transistor (TFT) structure with source
and drain electrode self-aligned to etching stopper edge shape.  With
this structure, on current of TFT increases due to the reduction of
channel length.  As the uniformity of the capacitance between gate
and source electrode is improved, the area of storage capacitor
decreases and aperture ratio of TFT panel increases.

      Because of the misalignment of the aligner in photo process,
the margin between source/drain electrode and etching stopper is
needed with conventional TFT structure and process.  This invention
discloses a way to reduce the margin between source/drain electrode
and etching stopper.

      After making gate line, SiOx, SiNx and amorphous silicon are
deposited in PECVD and two layers of etching stopper SiNx is
deposited
that are made in high temperature (such as 300 degrees C) and low
temperature (such as 200 degrees C).  After coating photoresist (Fig.
1),
by back-side exposure the photoresist except above the gate electrode
is
exposed, and photoresist remains only above the gate electrode after
developing process (Fig. 2).  Then etching stopper is etched using
buffered HF (Fig. 3), and photoresist stripped off (Fig. 4), and n+
microcrystalline silicon is deposited in PECVD (Fig. 5).  Buffered HF
etching is made, and as low-temperature-deposited SiNx dissolves in
buffered HF very fast, n+ microcrystalline silicon above gate
ele...