Browse Prior Art Database

Electrically Erasable and Programmable Read-Only Memory Device Having Three-Dimensional Double-Ridge-Shaped Floating Gate

IP.com Disclosure Number: IPCOM000116130D
Original Publication Date: 1995-Aug-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Ning, TH: AUTHOR

Abstract

Disclosed is an Electrically Erasable and Programmable Read-Only Memory (EEPROM) device having three-dimensional double-ridge-shaped floating gate. Compared to the usual planar floating gate structure, the three-dimensional double-ridge structure gives much larger floating-gate area, which in turn gives much larger overlap capacitance between the floating gate and the control gate. The larger the capacitance between the floating gate and the control gate, the more efficient is the coupling of the control gate voltage to the floating gate, and the more suitable is the EEPROM structure for low-voltage operation.

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Electrically Erasable and Programmable Read-Only Memory Device Having
Three-Dimensional Double-Ridge-Shaped Floating Gate

      Disclosed is an Electrically Erasable and Programmable
Read-Only Memory (EEPROM) device having three-dimensional
double-ridge-shaped floating gate.  Compared to the usual planar
floating gate structure, the three-dimensional double-ridge structure
gives much larger floating-gate area, which in turn gives much larger
overlap capacitance between the floating gate and the control gate.
The larger the capacitance between the floating gate and the control
gate, the more efficient is the coupling of the control gate voltage
to the floating gate, and the more suitable is the EEPROM structure
for low-voltage operation.

      Fig. 1 shows the schematic cross-sections of the present
invention, with (a) cut along the wordline or control gate, and (b)
cut perpendicular to the wordline or control gate.

      Fig. 2 shows the schematic cross-sections along the wordline at
various stages of fabricating the double-ridge-shaped floating gate
structure.  After the formation of the recessed field oxide, or LOCOS
(for local oxidation of silicon), in (a), a sidewall-layer material
(which can be oxide or polysilicon, depending on the mandrel material
used) is deposited followed by an reactive-ion etching step to form
the sidewalls or ridges as shown in (b).  After removing the mandrel
and the oxidation masking materials, a gate oxide is formed followed
...