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Improved Fuse Circuit of Memory Chip for Lead On Chip Module

IP.com Disclosure Number: IPCOM000116131D
Original Publication Date: 1995-Aug-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 28K

Publishing Venue

IBM

Related People

Iguchi, Y: AUTHOR [+3]

Abstract

Disclosed is a fuse circuit of memory chip for Lead On Chip (LOC) module. The improved fuse circuit has additional one inverter and one gate to bypass leak current on the chip fuse. The leak current through the blown fuse often causes a corrosion on the cathode of fuse. The bypass circuit reduces a leak current on the fuse.

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Improved Fuse Circuit of Memory Chip for Lead On Chip Module

      Disclosed is a fuse circuit of memory chip for Lead On Chip
(LOC) module.  The improved fuse circuit has additional one inverter
and one gate to bypass leak current on the chip fuse.  The leak
current through the blown fuse often causes a corrosion on the
cathode
of fuse.  The bypass circuit reduces a leak current on the fuse.

      The Figure shows the improved fuse circuit.   This includes one
inverter 11 and one gate 12.  After the module has been turned on,
signal "UPDATE" 13 is latched to be low level turning the gate 12 to
be on.  The gate 12 circuit is connected in parallel to fuse 14 and
operates as bypass circuit of leak current 15.  Decrease of leak
current on the blown fuse improves its reliability by inactivating
electro-chemical reaction residing on the cathode of fuse 14.