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Browse Prior Art Database

Trench Capacitor Having Large Capacitance and Small Resistance

IP.com Disclosure Number: IPCOM000116303D
Original Publication Date: 1995-Aug-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 37K

Publishing Venue

IBM

Related People

Ning, TH: AUTHOR [+2]

Abstract

Disclosed is a trench capacitor or an array of trench capacitors, where each capacitor consists of an inside-trench electrode of heavily doped polysilicon, and an outer electrode of heavily doped silicon, said outer heavily doped silicon electrode extends over the entire trench region.

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This is the abbreviated version, containing approximately 100% of the total text.

Trench Capacitor Having Large Capacitance and Small Resistance

      Disclosed is a trench capacitor or an array of trench
capacitors, where each capacitor consists of an inside-trench
electrode of heavily doped polysilicon, and an outer electrode of
heavily doped silicon, said outer heavily doped silicon electrode
extends over the entire trench region.

      Figs. (a) and (b) show the schematic cross-sections of two such
trench capacitors.  The one in (a) uses p-type silicon epi on heavily
doped (p+) silicon substrate, and the one in (b) uses regular p-type
silicon substrate.  In either structure, the resistance of the outer
electrode is low, and is determined by the heavily doped (p+) silicon
region which wrap around the entire trench.  This low-resistance
outer electrode, together with the low-resistance inner electrode,
give these trench capacitors both large capacitance and low parasitic
resistance.  Low parasitic resistance is important for applications
such as on-chip decoupling capacitor.

      The proposed trench capacitor can be fabricated using standard
trench-capacitor DRAM process.  After the silicon is etched to form
the trench, a boron diffusion can be performed to form the heavily
doped outer electrode region, followed by oxide/nitride layer
formation
and trench fill and planarization as in the standard trench-capacitor
DRAM process.