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Method for Handling Disabled Memory Blocks with Simulated Failures

IP.com Disclosure Number: IPCOM000116421D
Original Publication Date: 1995-Sep-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 8 page(s) / 326K

Publishing Venue

IBM

Related People

Macy, RB: AUTHOR [+2]

Abstract

Disclosed is a method allowing the user of the Hardware Failure Simulator (HFS) to determine whether a simulated failure is placed in a disabled portion of the memory of a Target System, which has been disabled by the Target System during a previous portion of a test process.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 23% of the total text.

Method for Handling Disabled Memory Blocks with Simulated Failures

      Disclosed is a method allowing the user of the Hardware Failure
Simulator (HFS) to determine whether a simulated failure is placed in
a disabled portion of the memory of a Target System, which has been
disabled by the Target System during a previous portion of a test
process.

      The HFS can simulate a hardware fault at any location in the
memory of a Target System, to test the ability of the Power-On Self
Test (POST) and Diagnostics routines to find the simulated fault or
"bug."  When the HFS user places simulated faults in the memory of
the Target System, he can control whether to let the HFS continue to
place bugs in an area of memory which has been disabled by the Target
System.  Under certain circumstances, the HFS can change the target
address of a bug so that it is applied to the same physical memory,
even though a different logical address has been assigned to the
memory location by the Target System.

      The HFS uses the Bug Analysis Research Tool (BART) interface to
indicate to the Target System that a problem has occurred in one of
its components.  There are five different components, or targets,
which in which the HFS can place bugs---memory, I/O ports,
Complementary Metal Oxide Semiconductor RAM (CMOS), non-volatile RAM
(NVRAM), and indirectly accessed registers.

      Figs. 1-4 show various screens displayed as the HFS is operated
in manual mode.  If the target is memory, the Target Options Menu of
Fig. 1 is displayed.  When the Ignore option is set to the default
value of "No," the HFS does not apply the simulated failure to an
address in an area of real memory that has been disabled by the
program in control of the Target System.  When this option is set to
"Yes," the bug is applied at all times, ignoring the enabled or
disabled status of the memory area.  Setting the Save option for CMOS
and/or NVRAM saves the contents of the target memory before the bug
is applied.  The default value is "Both."  Setting the  Restore value
to the default value of "Yes" restores the contents of target CMOS
and/or NVRAM from the data saved most recently.

      Fig. 2 shows a screen displayed if the target is CMOS, CMOS
address, NVRAM, or NVRAM address.  If the Ignore option is set to
"Yes," the bug is applied to all writes to the address or data ports
of the bug.  If this option is set to the default value of "No," the
bug is applied to the specified address only.  Setting the Apply
option, which has a default value of "No," to "Yes" causes the bug to
be applied before the first break caused by a write to the specified
address.  Normally a bug is not applied until a write to this
address.  This option is not available when the selected target is a
CMOS or NVRAM address.  Setting the Save option to a default value of
"Yes" saves the contents of the bug target in memory before the bug
is applied the first time.  Setting the Resto...