Browse Prior Art Database

Address Munging Support in a Memory Controller/PCI Host Bridge for the PowerPC 603 CPU Operating in 32-Bit Data Mode

IP.com Disclosure Number: IPCOM000116423D
Original Publication Date: 1995-Sep-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 125K

Publishing Venue

IBM

Related People

Amini, I: AUTHOR [+6]

Abstract

Disclosed is a mechanism to modify addresses (known as address munging), and conditionally swap bytes to and from a PowerPC 603* microprocessor when operating in Little-Endian (LE), 32-bit data mode, so as to keep the data accesses consistent with LE memory ordering.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Address Munging Support in a Memory Controller/PCI Host Bridge for
the PowerPC 603 CPU Operating in 32-Bit Data Mode

      Disclosed is a mechanism to modify addresses (known as address
munging), and conditionally swap bytes to and from a PowerPC 603*
microprocessor when operating in Little-Endian (LE), 32-bit data
mode,
so as to keep the data accesses consistent with LE memory ordering.

      The 603 supports little-endian through the modification of the
effective address combined with its normal big-endian byte ordering.
If written to memory unchanged, the byte ordering would be neither
big-endian nor little-endian and therefore inconsistent with a true
little-endian device.

      A memory controller utilizing the disclosed mechanism performs
the necessary address modification (address munging) along with the
necessary byte swapping to ensure that the byte ordering of memory or
I/O is consistent with the current endian-ness of the 603 processor
mode.  The address A(0:31), transfer size TSIZE(0:2), and the burst
signal N_TBST are decoded to generate byte enables which are applied
to a selector to determine the proper modification in order to undo
the 603's modification to the effective address.  This gives an
address that little-endian devices would expect.  In addition, the
bytes accessed by the 603 are swapped to give the proper
little-endian byte ordering.

      Address munging refers to the modification of certain address
bits by XORing them with certain patterns of 1s and 0s.  For the 603,
the lower three address bits are munged in LE mode.

      The following table shows how the effective address from the
603 is modified according to the number of bytes transferred.

PowerPC 603 address munging
                    32-bit Mode       64-bit Mode
  # of bytes        XOR with          XOR with
  1                 b'111'            b'111'
  2                 b'110'            b'110'
  4                 b'100'            b'100'
  8                 b'100' x 2        no change
                    beats
  cache line        b'100' x 8        no change x 4
  burst             beats             beats

      A beat (referred to in the Table) is defined to be a single
state on the 603 interface which may extend across multiple bus
cycles.  A 603 transaction may be composed of multiple address or
data beats.  For example, a single data beat in 64-bit mode can read
8 bytes (64-bits) of data, whereas in 32-bit mode, a read of 64-bits
of data would require two data beats....