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Method for Re-Designing a Point-to-Point Bi-Di Interface to Transparently Support Multiple Chips on One End of the Net

IP.com Disclosure Number: IPCOM000116487D
Original Publication Date: 1995-Sep-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 77K

Publishing Venue

IBM

Related People

Greenfield, JD: AUTHOR [+3]

Abstract

Disclosed is a method for using bi-di's to send and receive information to/from a single chip at one end of the net from/to two chips at the other end. The chips at the two chip end of the net are copies of the same chip and do not require any complex controls or inter-chip signalling. The fact that two chips are on the other end of the net is transparent to the single chip.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Method for Re-Designing a Point-to-Point Bi-Di Interface to Transparently
Support Multiple Chips on One End of the Net

      Disclosed is a method for using bi-di's to send and receive
information to/from a single chip at one end of the net from/to two
chips at the other end.  The chips at the two chip end of the net are
copies of the same chip and do not require any complex controls or
inter-chip signalling.  The fact that two chips are on the other end
of the net is transparent to the single chip.

The following conditions were present in the design environment of
the disclosure:
  o  A one-byte bi-di interface between a Host Chip (HC) and Channel
      Chip (CC) was architected and defined.
  o  An existing design which supported a four-byte dataflow on the
      host side of the HC and the one-byte bi-di interface on the
      channel side of the HC.  The following functions were supported
      in the existing design:
     o  Receive a Double-Word (DW) on the four-byte interface in two
         cycles and send it to the channel chip one byte at a time
     o  Receive eight single-byte transfers from the CC and form it
into
         a DW to be sent across the four-byte interface.
     o  Send one byte of status information to the channel chip.

      A new design was needed to support an eight-byte dataflow on
the host side of a new Host Adapter (HA) chip.  Two HA chips were to
be used to support the eight-byte dataflow.  The channel chip side of
the bi-di interface remained unchanged.  The disclosed method allows
the two new HA chips to transparently attach to the CC and relies on
a chip usage input and a counter to control the driving of the bidi
interface by the HA chips.

      Operations of the design is explained further by describing how
each of the three major bi-di interface functions are accomplished.
Refer to the Figur...