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Reversing the Order of Bytes in a Doubleword using Four Power Personal Computer Instructions

IP.com Disclosure Number: IPCOM000116517D
Original Publication Date: 1995-Sep-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 2 page(s) / 95K

Publishing Venue

IBM

Related People

Cohen, NH: AUTHOR

Abstract

Disclosed is a sequence of four PowerPC* instructions that copies the bytes of a doubleword from one storage location to another, reversing the order of the bytes. This is useful in some PowerPC systems if data written in big-endian mode is to be read in little-endian mode, or vice versa.

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This is the abbreviated version, containing approximately 52% of the total text.

Reversing the Order of Bytes in a Doubleword using Four Power Personal
Computer Instructions

      Disclosed is a sequence of four PowerPC* instructions that
copies the bytes of a doubleword from one storage location to
another, reversing the order of the bytes.  This is useful in some
PowerPC systems if data written in big-endian mode is to be read in
little-endian mode, or vice versa.

      When a PowerPC processor executes in little-endian mode, the
bytes addressed by load and store instructions are, in effect,
reversed within each doubleword.  Thus, if DW is divisible by eight,
a byte load or store for location DW+i is addressed to byte DW+(8-i)
for i=0,...,7, a halfword load or store for location DW+i is
addressed to halfword DW+(6-i) for i=0, 2, 4, or 6, and a word load
or store for location DW+i is addressed to word DW+(4-i) for i=0 or
4.

      On some systems based on PowerPC processors, hardware reversal
of the bytes in each doubleword, occurring somewhere along the path
from the processor to main memory, may be activated when the
processor is placed in little-endian mode, thus undoing the effect
described above and ensuring that a given byte, halfword, or word in
main memory is known by the same address in big-endian mode and
little-endian mode.  However, this hardware reversal is not present
in all systems based on the PowerPC processor.

      In the absence of hardware reversal, switching a PowerPC
processor from big-endian mode to little-endian mode or vice versa
reverses the apparent position (as seen by load and store
instructions) of the bytes within each doubleword of main memory.  If
an operating system supports context switching between processes
running in big-endian mode and processes running in little-endian
mode, and if data is to be transmitted from a process running in one
mode to a process running in another mode, it is necessary for
software to reverse the bytes within each doubleword of the data
placed in memory in one mode in order for the bytes to appear in the
correct order in the other mode.  Since communication between
processes running in different modes may occur frequently as a part
of time-critical processing, it is important for this software
reversal to be fast.

      Data can be copied as follows from one area of main memory to
another using four PowerPC load or store instructions for each
doubleword, so that the bytes of each doubleword in the copy occur in
the reverse of the order in which they appear in the corresponding
doubleword of the original:

      Initially, one general-purpose register contains eight less
than the address of the data t...