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Browse Prior Art Database

Method for Providing Digital to Analog Converter Shadowing on Micro Channel Systems

IP.com Disclosure Number: IPCOM000116526D
Original Publication Date: 1995-Sep-01
Included in the Prior Art Database: 2005-Mar-30
Document File: 4 page(s) / 123K

Publishing Venue

IBM

Related People

Pennisi, JM: AUTHOR [+2]

Abstract

Disclosed is a method providing Digital to Analog Converter (DAC) shadowing on a system having a Micro Channel* bus. This shadowing technique is a method to pass DAC information to both the local bus device of a Video Electronics Standards Association (VESA) local bus graphics controller, and to the expansion bus, such as an Industry Standard Architecture (ISA) or Micro Channel bus. The presently disclosed method uses the Channel Ready signal to allow an adapter to extend the length of a standard Micro Channel cycle.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 51% of the total text.

Method for Providing Digital to Analog Converter Shadowing on Micro
Channel Systems

      Disclosed is a method providing Digital to Analog Converter
(DAC) shadowing on a system having a Micro Channel* bus.  This
shadowing technique is a method to pass DAC information to both the
local bus device of a Video Electronics Standards Association (VESA)
local bus graphics controller, and to the expansion bus, such as an
Industry Standard Architecture (ISA) or Micro Channel bus.  The
presently disclosed method uses the Channel Ready signal to allow an
adapter to extend the length of a standard Micro Channel cycle.

      A conventional VESA controller monitors the local bus,
detecting any cycles it must service.  When such a cycle is detected,
the VESA controller signals the system bus controller that it owns
the current cycle, and the bus controller aborts any attempt to pass
this request to the expansion bus.  The VESA device services the
cycle, responding to the requester through the standard local bus
protocol.  However, certain graphics operations must be detected by
each of the graphics controllers in a system.  Without this
capability, for example, when an operating system or application is
required to change the palette in a system using more than one
graphics subsystem, after the local bus device accepts the cycle,
only the palette in the local bus subsystem is updated, so that the
secondary subsystem subsequently displays the wrong colors.

      This problem is conventionally circumvented using "DAC
shadowing," in which the local bus graphics controller continues to
accept all local bus cycles which it determines are destined for the
graphics subsystem, except for I/O writes to addresses 0x3C6, 0x3C7,
0x3C8, and 0x3C9, which are writes to the DAC.  When the local bus
controller detects such a write operation, it continues to process
the signals internally as though it has accepted them, writing to the
DAC in its subsystem.  The cycles passed along to the expansion bus
are detected by graphics subsystems on adapter cards, so that all DAC
palettes are kept in synchronization.  This method works as long as
there is sufficient time for the local bus graphics controller to
complete its access to the DAC.  For other local bus graphics cycles,
this is not a problem, because the graphics controller determines
when the cycle ends.  However, during a DAC shadowed cycle, the local
bus controller is at the mercy of the graphics adapters in the
expansion bus, or of the default timings of the expansion bus when no
other graphics adapter is present.  While most VESA local bus
controllers are designed to work with the ISA expansion bus, which
has a default I/O cycle time of 500 ns (nanoseconds), on the Micro
Channel bu...