Browse Prior Art Database

Very High Design Language Simulation Coverage Measurement

IP.com Disclosure Number: IPCOM000116618D
Original Publication Date: 1995-Oct-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 51K

Publishing Venue

IBM

Related People

Benayoun, A: AUTHOR [+4]

Abstract

A VHDL description contains assignment statements and decision blocks which can be analyzed in two ways: 1. The DATA FLOW analysis checks how the logic Boolean values are propagated. It verifies that latches and buses have correct values at specific times ("expected value" notion). 2. The CONTROL FLOW analysis checks the sequences of switches and decision elements ("Paths") that lead to a logic state change. It verifies that they have been activated or not during the simulation ("exercised path" notion).

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Very High Design Language Simulation Coverage Measurement

      A VHDL description contains assignment statements and decision
blocks which can be analyzed in two ways:
  1.  The DATA FLOW analysis checks how the logic Boolean values are
       propagated.  It verifies that latches and buses have correct
       values at specific times ("expected value" notion).
  2.  The CONTROL FLOW analysis checks the sequences of switches and
       decision elements ("Paths") that lead to a logic state change.
       It verifies that they have been activated or not during the
       simulation ("exercised path" notion).

      The purpose of this disclosure is a method which quantifies a
VHDL logic CONTROL FLOW activation during the simulation phase and so
permits to validate the test case coverage.

      It is based on 5 main options whose flow is described in the
following:
  1.  The first one (1) builds a Path file containing the list of all
       or part of the logic decision Paths and some information
       necessary for the simulator activation measurement.
  2.  The second one (2) calls the simulation results collection in a
       simulation result file.
  3.  The third one (3) calls the Path File update with the
significant
       simulation test cases results.
  4.  The fourth one (4) consists in statistics reports generation to
       help the designer in studying the areas not covered. ...