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High Performance Novel Distributed Arithmetic Architecture to Achieve Optimal Error Build up with Minimal Hardware

IP.com Disclosure Number: IPCOM000116765D
Original Publication Date: 1995-Nov-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 68K

Publishing Venue

IBM

Related People

Horvath, TA: AUTHOR [+3]

Abstract

This disclosure describes a novel architecture for implementating Distributed Arithmetic (DA). It not only achieves minimal error build up with minimal hardware to store the computation result, but also achieves higher performance than the original DA architecture.

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This is the abbreviated version, containing approximately 52% of the total text.

High Performance Novel Distributed Arithmetic Architecture to Achieve
Optimal Error Build up with Minimal Hardware

      This disclosure describes a novel architecture for
implementating Distributed Arithmetic (DA).  It not only achieves
minimal error build up with minimal hardware to store the computation
result, but also achieves higher performance than the original DA
architecture.

      Distributed Arithmetic is widely used in many applications as a
cost effective replacement for inner product computation (multiply
and add).  For example, the JPEG and MPEG standard use Discrete
Cosine Transform (DCT) as their most computation intensive core.  The
DA architecture is well suited for implementing the multiplication
and addition in the DCT algorithm.  However, for application such as
MPEG, the tolerance for computation error is very low because any
erroneous image data may be reused over and over again.  This explain
why IEEE CAS Committee submit standard proposal P1180 to specify the
limitation of error for implementation of 8x8 Inverse Discrete Cosine
Transform.

      Due to the shift and add and the 2's complement representation
scheme used by DA, we need bigger register size to store the
intermediate computation result to avoid drop bits and error build
up.  To solve the problem, a new computation architecture for DA is
invented to minimize the truncation error for the limited
intermediate storage space provide to meet the required CCITT
standard.

The problems, as stated earlier, of using DA can be summarized as
follows:
  (1) Large Accumulator size is required to avoid the truncation
error.
  (2) Error build up for the small negative number, due to the 2's
       complement implementation scheme used by DA.
  (...