Browse Prior Art Database

Fabrication Process for Container and Crown Electrodes in Memory Devices

IP.com Disclosure Number: IPCOM000116819D
Original Publication Date: 1995-Nov-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 4 page(s) / 92K

Publishing Venue

IBM

Related People

Kotecki, DE: AUTHOR [+2]

Abstract

Disclosed is a fill/etchback-type process for making noble metal container (cup) and/or crown electrodes for memory devices containing High-Epsilon (HE) and Ferroelectric (FE) dielectrics. The process is similar to earlier processes (1,2) developed to make electrodes of doped poly-silicon. However, poly-silicon is not a suitable electrode material because it reacts with both oxygen and the dielectric layer.

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Fabrication Process for Container and Crown Electrodes in Memory
Devices

      Disclosed is a fill/etchback-type process for making noble
metal container (cup) and/or crown electrodes for memory devices
containing High-Epsilon (HE) and Ferroelectric (FE) dielectrics.  The
process is similar to earlier processes (1,2) developed to make
electrodes of doped poly-silicon.  However, poly-silicon is not a
suitable electrode material because it reacts with both oxygen and
the dielectric layer.

      Previously, doped poly-silicon container/crown electrodes have
been made by fill/etchback processes (1) and by chemical mechanical
polishing (CMP) with a sacrificial oxide layer (2).  The disclosed
process is a variation of the fill/etchback process of (1), optimized
for
oxidation-resistant noble metal electrode materials such as Pt.  Like
the
process of (1), it does not require CMP of the electrode material.
The
steps of the disclosed process for fabricating a basic container
(cup)
electrode are listed below and shown in Fig. 1 (a-h).
  1.  Open a hole 1 in a support layer 2 whose thickness is
       approximately equal to the desired depth of the container
       electrode.  The hole 1 is shown over a conductive plug 3
embedded
       in dielectric 4 (Fig. 1a).
  2.  Conformally deposit a thin layer of electrode material 5
       (Fig. 1b).
  3.  Deposit and planarize a filler material 6 (Fig. 1c).
  4.  CMP or etch the filler material 6 to expose the top horizontal
       surface of electrode material 5 (Fig. 1d).
  5.  Remove the exposed layer of electrode material, preferably
       selectively (e.g., by F-based reactive ion etching) (Fig. 1e).
  6.  Optionally remove the filler material 6 (Fig. 1f) and/or the
       support layer 2 (Fig. 1g or 1h).

      The process steps are nearly identical to those of (1), with
the exception that the filler material in the present process is not
SiO sub 2 . The filler material of the present process has the
properties that it (i) can be planarized by CMP (step 3), (ii) is
etch-resistant during the electrode etch (step 5), and (iii) can be
easily removed without damage to the electrode at the end of the
process (step 6).  With Pt as the electrode material,  SiO sub 2
would not satisfy condition (ii) since its etch rate (in F-based
plasma) greatly exceeds that of Pt.  An example of an a...