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Linear Servo Signal Conversion with Phase Insensitive Sampling

IP.com Disclosure Number: IPCOM000117059D
Original Publication Date: 1995-Dec-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 50K

Publishing Venue

IBM

Related People

Cheung, WL: AUTHOR [+2]

Abstract

A digital circuit is disclosed to provide linear servo signal detection with a phase misaligned sampling clock. Adequate linear amplitude conversion can be obtained with this simple logic circuit, as shown in Fig. 1, without extensive signal processing and averaging. The linear signal detection method is an integrating type with signal equalization and is not sensitive to phase error and peak amplitude noise jitters.

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Linear Servo Signal Conversion with Phase Insensitive Sampling

      A digital circuit is disclosed to provide linear servo signal
detection with a phase misaligned sampling clock.  Adequate linear
amplitude conversion can be obtained with this simple logic circuit,
as shown in Fig. 1, without extensive signal processing and
averaging.  The linear signal detection method is an integrating type
with signal equalization and is not sensitive to phase error and peak
amplitude noise jitters.

      Two logic circuit sections are included for the detector.  The
first section is a fixed tap logic equalizer, as shown in Fig. 2,
with data delay registers B through G and adders 1 through 5.  The
logic functions with a sampling clock having a frequency of 8 times
of the sampled servo signal and a taps of "-1, -1.5, -1, 0, 1, 1.5,
1".  The equalizer is improved for extra reduction of signal shoulder
noise effects.  The linear amplitude conversion circuit is shown in
Fig. 3.  The circuit, in step "A", detects a data sign change from
positive to negative, and, in step "B", skips the first sample after
a sign change is detected, then, in step "C", the absolute value of
the next two samples, |Xa| and |Xb|, are multiplexed to an adder and
also to a subtracter.  In step "D", the adder output and subtracter
output which is shifted by one-bit (a divide-by-2 operation) are
added again to produce the final amplitude conversion output for
servo accumulation processing.  The circu...