Browse Prior Art Database

Current Loop CMOS Driver Receiver

IP.com Disclosure Number: IPCOM000117223D
Original Publication Date: 1996-Jan-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 6 page(s) / 136K

Publishing Venue

IBM

Related People

Cao, T: AUTHOR [+3]

Abstract

The circuit used to drive or transmit a signal from a CMOS chip is called the Off-Chip-Driver. These circuits typically are much larger physically in terms of area occupied on the chip.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Current Loop CMOS Driver Receiver

      The circuit used to drive or transmit a signal from a CMOS chip
is called the Off-Chip-Driver.  These circuits typically are much
larger physically in terms of area occupied on the chip.

      This is because the off chip driver sends a signal over a
printed circuit transmission line where the line must be terminated
in its characteristic impedance.  The characteristic impedance is a
value in the range of 50-100 ohms.  In the case of a source
terminated driver, the combined impedance of the transistors and  a
series resistor would also be in the range of 50-100 ohms.  This is a
low resistance for CMOS transistors which leads to large width to
length ratios and a corresponding large physical size in the devices
and the total circuit.

      Also another way of looking at the larger size requirement for
Off Chip Drivers is that they are required to drive large capacitance
loads and must be able to deliver large amounts of current thus their
size must be large.

      Large devices result in large input capacitance, much larger
than encountered in typical on chip only circuits.  This higher
capacitance slows down the signal transitions from the source and
through the off chip driver degrading performance.

      Fig. 1 shows a schematic of the invention consisting of two
identical driver/receivers connected by a transmission line.  This
arrangement is intended to be a bidirectional interface between CMOS
logic chips on the same MCM, card or board.

      Figs. 2 and 3 show the individual driver receivers from Fig. 1
enlarged for easier reading of the schematics.  The schematics of
Figs. 2 and 3 are identical.  It is sufficient to look at only Fig.
2.  Fig. 2 is a driver receiver combination that can send and receive
data from a transmission line.  Data received from the transmission
line is presented to the internal chip logic at the node labeled
"OUTPUT 1" (dout1 in ASX).  Data is accepted for transmission at the
node labeled "INPUT" (din1 in ASX) and driven out over the
transmission line to a second chip with the same driver receiver
connected in a similar manner.

      The significance of this disclosure and circuit arrangement is
that it drives the transmission line with a current source as opposed
to a voltage source type signal as can be seen with the 200 ohm
resistors in series with the T...