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Algorithm to Deduce a VHDL Logic Control Flow from a Relational Database

IP.com Disclosure Number: IPCOM000117387D
Original Publication Date: 1996-Feb-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 4 page(s) / 104K

Publishing Venue

IBM

Related People

Benayoun, A: AUTHOR [+5]

Abstract

This invention is a program that scans a DA/DB relational database and recognizes the decision elements paths of the logic control flow. In addition, it builds a graphical representation of the paths.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Algorithm to Deduce a VHDL Logic Control Flow from a Relational Database

      This invention is a program that scans a DA/DB relational
database and recognizes the decision elements paths of the logic
control flow.  In addition, it builds a graphical representation of
the paths.

The advantages of the current solution are the following:
  o  It gives a graphical representation of the database contents
  o  The database operates bit by bit while the program recreates the
      bus information

Applications of the invention:
  o  Any development of VLSI chips using the VHDL language

The following terminology applies to this invention:
  DA/DB Relational Data base is a relational Data Base is a
collection of objects for which are defined relationships through
specific functions.

      The Design Automation Data Base (Proprietary of Advanced
Workstation Division, IBM* Austin) objects are boxes (Boolean
functions) and signals (boxes interconnection).  The relations
between them build all the necessary information to describe a
hardware logic (signal names, fan_in, fan_out,...).

Path: A Path is a sequence of control decisions (If, Case,
conditional assignment and With VHDL statements) starting from a
Structure Primary Input (PI) or a latch and ending at a latch or a
Structure Primary Output (PO), giving for each element the leg
(If/Else for an If, branch value for a Case, etc...) taken.  The
logic control flow is the paths collection.
   Hereafter is a glossary of the database functions used in the
    algorithm.

Box: Boxes are used to describe the VHDL statements.  VHDL
statements may be represented by one or more boxes.

Keyword: Keywords have been associated with boxes
  1.  to recognize IF statement THEN and ELSE legs ("leg" keyword)
  2.  to save the IF statement conditions ("content" keyword)

Net: Nets serve to connect the boxes of the data base.  They
represent VHDL signals and variables.

Pin: Pins are the points on boxes to which nets are connected.

Proto: A proto defines a VHDL entity / architecture.

Signal Names

Sink: Each box input pin to which a net is connected is called a
sink of the net.  Nets may have multiple sinks.

Source: Each box output pin to which a net is connected is called a
source of the net.  Nets may have multiple sources though typically
will have only one.

Vector: Vectors describe VHDL logic_vectors.  Vector names and
strands are best explained by example:

      If "A_SIGNAL(23)" is a signal name, "A_SIGNAL" is a vector
signal name and "23" is a vector signal strand.

Virtual pin: Virtual pins are introduced into the data base to allow
some level of pin grouping of box inputs and outputs.

Description of the Inv...