Browse Prior Art Database

High Performance In Situ Testing Module Clip

IP.com Disclosure Number: IPCOM000117388D
Original Publication Date: 1996-Feb-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 58K

Publishing Venue

IBM

Related People

Holmquist, RA: AUTHOR [+5]

Abstract

A high-performance, low-profile in situ test clip is described.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 60% of the total text.

High Performance In Situ Testing Module Clip

      A high-performance, low-profile in situ test clip is described.

      The ability to do detailed logic net performance at system
performance without introducing coupled noise and doing it in the
system is a problem.  Currently, this work requires soldering wires
to the module leads and twisting a ground wire around the signal
lead.  This is both time-consuming (maybe 1/2 hour or more) and
potentially causes  future problems at the solder joint and can make
the card no longer ship-level.  This is done on one to two lines at a
time.

      The current module clips that are on the market cannot handle
the higher bus speeds in the system and are of higher profile.  This
prevents these clips to be used in the system for in situ type
testing.

      This clip design allows for testing/characterizing the entire
module simply by clipping onto the module.  This reduces the
debug/characterization time significantly.  It also allows for moving
around the card in a much quicker manner.

      The Figure shows a side view of the new test clip being used
with a thin small outline package (TSOP) type-2 package (1), a piece
of 2-layer flex cable (2), with one layer being signal lines and the
other being a ground layer contacts each lead on the logic/memory
package and brings it out for later connection.  Contact between the
package lead is done via a gold bump on the flex.  The flex cable is
stiffened behind t...