Browse Prior Art Database

Scatter/Gather Buffer Management with Asynchronous Transfer Mode Cell Multiplexing

IP.com Disclosure Number: IPCOM000117412D
Original Publication Date: 1996-Feb-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 4 page(s) / 163K

Publishing Venue

IBM

Related People

Badter, RK: AUTHOR [+3]

Abstract

Disclosed is a technique and hardware which allows Asynchronous Transfer Mode (ATM) adapters to manage host data buffers using a scatter/gather process where the ATM cell segmentation/reassembly is performed within the host buffers. When transmitting data to the ATM network, the management of the host data buffers segments the buffer contents into ATM cells and transmits the cells to the network using a traffic shaping algorithm. When receiving ATM cells from the network, they are reassembled into frames within the host buffers.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 44% of the total text.

Scatter/Gather Buffer Management with Asynchronous Transfer Mode
Cell Multiplexing

      Disclosed is a technique and hardware which allows Asynchronous
Transfer Mode (ATM) adapters to manage host data buffers using a
scatter/gather process where the ATM cell segmentation/reassembly is
performed within the host buffers.  When transmitting data to the ATM
network, the management of the host data buffers segments the buffer
contents into ATM cells and transmits the cells to the network using
a traffic shaping algorithm.  When receiving ATM cells from the
network, they are reassembled into frames within the host buffers.

      When transmitting, the ATM adapter will segment frames for each
VP/VC connection into a series of ATM cells and multiplex the cells
from each of these frames onto a physical media.  Each of these
frames is located in one or more buffers located in the host memory.
ATM frames are transmitted based on a traffic shaping algorithm.
This algorithm determines when a cell from each frame is placed on
the media.  The location of the cell within the host memory is
determined by which buffer is currently involved in the data
gathering process and where in that buffer the cell is located.

      When receiving, ATM cells from the network are reassembled
into frames by the adapter hardware as the cells are placed into host
buffers located in the host memory.  It may require multiple host
buffers to hold a frame received from the network.  These buffers are
obtained by the ATM adapter hardware from a "Free Buffer" pool and
linked together, on an as needed bases, until the complete frame is
stored in the host memory.  Because the adapter can reassemble many
frames simultaneously, the buffers obtained from the "Free List" are
scattered throughout the host memory space.  The frame reassembly
process must kept track of the buffer currently being used for each
frame being reassembled and the location within each buffer of where
to put the next ATM cell received for that frame.

      Tables residing in the adapter hardware contain information
used to control the scatter/gather process as well as the ATM
segmentation and reassembly process.

Transmit Operation:

      Fig. 1 contains a single transmit frame descriptor 111 with
transmit buffers 112.  Additional frames could be chained to this
frame using the Forward Pointer located in the frame descriptor 113.
Contained in the Transmit Frame Descriptor is the Buffer Count field
used to tell the adapter hardware the number of buffers associated
with this descriptor 114, the data buffer address 115 of each data
buffer associated with this descriptor, and the number of data bytes
in each of the data buffers 116.  To transmit the frame, the ATM
adapter hardware begins by locating the transmit frame descripter
structure 111 located in the host memory.  The adapter hardware is
given a pointer to this structure by the device driver when the
device driver initiates the...