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Clock Deglitcher using Direct Oversampling

IP.com Disclosure Number: IPCOM000117444D
Original Publication Date: 1996-Feb-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 41K

Publishing Venue

IBM

Related People

Benayoun, A: AUTHOR [+4]

Abstract

Disclosed is a method to improve the clock stability to avoid erroneous sampling due to external EMC, ESD, crosstalk or bad contacts. The oversampling method is generally used to overcome this problem on data but cannot be directly applied to clock. The idea is to analyze three continuous samplings to make a decision.

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Clock Deglitcher using Direct Oversampling

      Disclosed is a method to improve the clock stability to avoid
erroneous sampling due to external EMC, ESD, crosstalk or bad
contacts.  The oversampling method is generally used to overcome this
problem on data but cannot be directly applied to clock.  The idea is
to analyze three continuous samplings to make a decision.

The advantages of the current solution are the following:
  o  Optimized for simple glitch elimination
  o  Multiple spikes can be suppressed but the length should be less
      than the oversampling time
  o  High speed clocks difficult to support

Applications of the invention:
  o  All communication lines except very high speed lines where other
      methods will be less expensive.

      A high speed clock FCK is used to achieve an acceptable
oversampling of the input clock.  The frequency used for this master
clock FCK should be defined in accordance with the jitter allowed in
the mechanism.  A jitter corresponding to the period of FCK will be
introduced by the present mechanism.

      A state machine with compare three consecutive sampling is
shown on the timing, either the three samplings are the same and the
resulting state will take the value of the three samplings or one is
different from the two other and the resulting state will take the
value of the two identical states.  This process is done continuously
with a sliding of the sampling window resulting in a degl...