Browse Prior Art Database

Power Factor Correction Circuit

IP.com Disclosure Number: IPCOM000117477D
Original Publication Date: 1996-Mar-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 4 page(s) / 147K

Publishing Venue

IBM

Related People

Perryman, RA: AUTHOR

Abstract

If an electrical appliance has a low power factor, there is an associated inefficiency in conversion of electricity supplied from the mains. International standards are continuously being revised to increase the level of acceptable power factor in view of escalating pressure on mains power distribution systems.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 50% of the total text.

Power Factor Correction Circuit

      If an electrical appliance has a low power factor, there is an
associated inefficiency in conversion of electricity supplied from
the mains.  International standards are continuously being revised to
increase the level of acceptable power factor in view of escalating
pressure on mains power distribution systems.

      Electrical equipment, frequently used in consumer and office
applications, has a power supply to convert the mains input to
useable levels.  The power supplies, both switched mode and linear,
have rectifying circuits and capacitors to store energy at a useable
level of voltage.  Together these rectifiers and capacitors lead to
short surges of current being drawn from the mains supply.

      Ideally, the current drawn from the mains should be a smooth
sinusoid, both in phase and synchronized with the mains voltage.
This smooth sinusoid can be analyzed as being only the (mains)
fundamental frequency.  The short surge of current can be analyzed as
having the fundamental frequency plus higher harmonics of the
fundamental (x2, x3, x....., xn).  These harmonics currents are
measured in the ew power factor standards (normalized as mA/W) and
are compared with a maximum value for each harmonic.

      Surges of current into rectifier and capacitor circuits
frequently have harmonics at a level which exceed the new power
factor specification.

      The described circuit adds additional pulses to the short surge
to restore a 'smooth' sinusoidal current drawn from the mains.  The
circuit operates to create a more 'sinusoidal' current waveform using
time delays to meet the new specification's levels.  The solution to
controlling 'power factor' harmonics provided by the circuit can be
justified using a combination of sampling theorems and Fourier
analysis.  The circuit reduces the magnitude of higher mains
harmonics by drawing additional current surges from the mains.  It is
the shape and timing of the additional pulses which are used to
cancel or reduce the value of higher harmonics.

      Fourier transform theory shows that a delayed pulse has a set
of harmonics which are unchanged in magnitude but phase shifted,
throughout the pulse's spectrum.  If a waveform is made up from a
'short surge' pulse and a delayed 'additional pulse' the resultant
spectrum is the sum of the 'short surge' pulse's spectrum plus the
phase shifted 'additional pulses' spectrum.

      Each part of the spectrum is a vector.  It has magnitude and
phase.  The sum of two vectors is the key to suppressing particular
parts of the 'short surge' spectrum.  The phase shift is related to
the delay between the 'short surge' and the 'additional pulse'.
Choosing a delay to affect selected harmonics can be used to cancel
or reduce the magnitude of that harmonic's vector, i.e., a time delay
can be chosen so that the mth harmonic of the 'additional pulse' is
180º  phase shifted with respect to the ...