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Fast Unsymmetrical Multiplier Logic with Distributed Booth Encoding and Prioritized Powering

IP.com Disclosure Number: IPCOM000117623D
Original Publication Date: 1996-Apr-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 65K

Publishing Venue

IBM

Related People

Gerwig, G: AUTHOR [+3]

Abstract

In fast Floating Point Units, a Multiply Instruction has to be executed within one cycle. Consider a Multiplier of 61 x 61 bit. The state of the art solutions (Fig. 1) with an arraytype multiplier is too slow for the cycle. Another alternative with a customized multiplier array is uncertain in its result and needs very great effort (schedule and cost).

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Fast Unsymmetrical Multiplier Logic with Distributed Booth Encoding
and Prioritized Powering

      In fast Floating Point Units, a Multiply Instruction has to be
executed within one cycle.  Consider a Multiplier of 61 x 61 bit.
The state of the art solutions (Fig. 1) with an arraytype multiplier
is too slow for the cycle.  Another alternative with a customized
multiplier array is uncertain in its result and needs very great
effort (schedule and cost).

      The unsymmetrical structure of twelve logical Multiplier Macros
with an integrated Booth Encoder and prioritized powering (Fig. 2)
improves the performance of the multiplier essentially.  Instead of
discrete counters, Full Adder books are used.  The unsymmetrical
timing behavior of the Input Output's (IO's) of these books are fully
used to shorten delays.

      This leads to an unregular structure of the multiplier.
However, the new timing driven placement programs can place this
logic in an optimal way.

      Twelve logical Multiplier Macros (eight different Macro types
MUM 1-8) with integrated Booth Encoder allow a powering priority
according to timing needs.  The data flow from Macro 4 to 6/7 to 9 is
the most timing critical (eight Full Adder stages).  This path must
get the highest powering priority.

      The Multiplier Macros use internally Full Adder books as
counters.  The timing behavior of these books is unsymmetrical.  A
Full Adder book has three inputs and two outputs.  One in...