Browse Prior Art Database

Multi-Set Counters

IP.com Disclosure Number: IPCOM000117712D
Original Publication Date: 1996-May-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 40K

Publishing Venue

IBM

Related People

Hoang, NT: AUTHOR [+2]

Abstract

In high-performance system designs, cost management is essential where storage elements are shared and read by several sources. Each source may want to access different regions of the shared storage sequentially with its own pointer, which traditionally requires distributed counters, thereby duplicating the cost of each set of counter and the state machine to control them individually.

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Multi-Set Counters

      In high-performance system designs, cost management is
essential where storage elements are shared and read by several
sources.  Each source may want to access different regions of the
shared storage sequentially with its own pointer, which traditionally
requires distributed counters, thereby duplicating the cost of each
set of counter and the state machine to control them individually.

      To satisfy the random sequential access requirement from
several sources, using multiplexors to select one of many counters
will result in access delay due to the addition of the multiplexor
component in the path.  To avoid the increase in access delay without
the multiplexor in the path to the shared storage element, one
usually stage a set of registers between the multiplexor and shared
storage to maintain minimum delay in the logic path, but this adds
latency cycle wise and which in turn degrades the performance.
Compensating for the added latency creates complexities and adds
unnecessary risks.

      A multi-set counter can avoid the gate delay penalty of the
multiplexor component without the need to add cycle latency to access
the shared storage.  This is accomplished by consolidating the
counters into a centralized set of storage pointers, feed into a
specialized counter, which in turn drives the shared storage without
any latency at all.  The centralized set of storage pointers are
basically registers with multiplexors at their inputs t...