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High-Speed Binary Double/Single Precision Floating Point Incrementer with Integrated Clear for Single Precision Mantissa Values and Integrated Bit Invert

IP.com Disclosure Number: IPCOM000117744D
Original Publication Date: 1996-May-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 4 page(s) / 117K

Publishing Venue

IBM

Related People

Bartling, SC: AUTHOR

Abstract

The design for a high speed binary incrementer can be used as a basis for the design of a high speed double precision/single precision incrementer with built in clear functions for single precision operations and a built in bit invert function (hereafter denoted as the "flip" function). The bit invert function can be used to invert each bit of the incrementer result or it can be used to force the incrementer to perform as a decrementer (if the data inputs to an incrementer are bit-wise inverted, the incrementer will preform as a decrementer if the result is then bit-wise inverted).

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High-Speed Binary Double/Single Precision Floating Point Incrementer
with Integrated Clear for Single Precision Mantissa Values and Integrated
Bit Invert

      The design for a high speed binary incrementer can be used as a
basis for the design of a high speed double precision/single
precision incrementer with built in clear functions for single
precision operations and a built in bit invert function (hereafter
denoted as the "flip" function).  The bit invert function can be used
to invert each bit of the incrementer result or it can be used to
force the incrementer to perform as a decrementer (if the data inputs
to an incrementer are bit-wise inverted, the incrementer will preform
as a decrementer if the result is then bit-wise inverted).

      The incrementer incorporates two unique features in such a
manner as to avoid a negative impact on the speed of the incrementer.
  1) Double precision floating point numbers have a mantissa length
of 53 bits.  Single precision operations have a mantissa length of 24
bits.  In order to minimize hardware, a double precision incrementer
has been designed to perform as a single precision incrementer as
required.  Assuming the Most Significant Bit (MSB) of the mantissa
value is Bit 0, the Least Significant Bit (LSB) for a single
precision number  is Bit 23 and the least significant bit for a
double precision number is  Bit 52.  The lower order bits from Bit 24
through Bit 52 must be cleared  (set to zero) in a single precision
operation and a carry input is required into the LSB of the single
precision number.  The incrementer  described below incorporates
these features.
  2) In order to perform a double/single precision decrement, the
inputs to the incrementer must be bit-wise inverted and the result of
the increment must be bit-wise inverted.  The incrementer described
below incorporates the ability to perform bit-wise inversion of the
incrementer result.  Incrementing the input operand is not
implemented in this incrementer though that can be done in a
straightforward fashion.

The equations for a novel single/double precision incrementer are
shown below:

      Note:  To clear a bit and to flip a bit, we will manipulate
the inputs to the XOR gate used to perform the sum operation below.
Introducing additional stages that will slow down the incrementer can
be avoided.
  Also note in the discussion that follows:
    dinc ==> increment a double precision number.
    sinc ==> increment a single precision number.
    X ==> denotes the bit-inverse of a boolean variable.

To flip the ouput, all we need to do is invert one of the inputs to
the XOR gate.
    LE W = (Y XOR Z) = (XY & Z) + (Y & XZ)

      If the variable Y in the expression above is complemented, the
following expression results:
    =(XY XOR Z) = (Y & Z) + (XY & XZ)

      If the function W = (Y XOR Z) is complemented, then XW = (Y
XNOR Z) is complemented, then XW = (Y & Z) + (XY & XZ) results
...