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Browse Prior Art Database

Double Data Write in Self-Precharged Single Clock Dram

IP.com Disclosure Number: IPCOM000117878D
Original Publication Date: 1996-Jul-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 4 page(s) / 86K

Publishing Venue

IBM

Related People

Miyatake, H: AUTHOR [+2]

Abstract

Disclosed is a method for double data write in a self-precharged single clock DRAM (SPSC-DRAM) in one cycle. Double data write in one cycle makes data rate twice as much as conventional SPSC-DRAM without increasing data input port. Controlling timing of self-precharge in write mode with a write-enable signal assures second write operation.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 78% of the total text.

Double Data Write in Self-Precharged Single Clock Dram

      Disclosed is a method for double data write in a
self-precharged single clock DRAM (SPSC-DRAM) in one cycle.  Double
data write in one cycle makes data rate twice as much as conventional
SPSC-DRAM without increasing data input port.  Controlling timing of
self-precharge in write mode with a write-enable signal assures
second write operation.

      Fig. 1 shows a timing chart of conventional SPSC-DRAM.  The
Data Latch Clock (DLTH) resets the Internal Main Clock (CLK) and
starts precharging bit lines.  Because precharging bit lines
conflicts the write operation, it's difficult to assure second write
operation.

      Fig. 2 shows a timing chart of this invention.  The DRAM
latches second data at the falling edge of the Data Strobe (DSN) and
starts writing second data.

      Write Enable (WEN) defines functional mode.  If it is low at
the falling edge of the External Clock (CEN), Write Mode (WRITE) is
high and DRAM works in write mode.  If it is high at the falling edge
of CEN, WRITE is low and DRAM works in read mode.  WEN prevents DLTH
from resetting CLK during the time when WEN is low in write mode.  It
can control self-precharging in write mode.  When WEN goes high, WEN
resets CLK and starts precharging.  It enables SPSC-DRAM to write
second data with the self-precharging feature of SPSC-DRAM.  Because
the cycle doesn't end in write mode unless WEN goes high, the DRAM
user can write...