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Simplified Collision Handling for Castouts

IP.com Disclosure Number: IPCOM000117973D
Original Publication Date: 1996-Aug-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 64K

Publishing Venue

IBM

Related People

Hoover, RD: AUTHOR [+2]

Abstract

Castouts (writes that shift cache lines from modified to the shared or invalid states) can collide with other operations in a number of ways. They can also encounter resource problems with the directory, and logic to handle all these possible problems can get complicated. This logic can be simplified by not updating the directory when certain resource conflicts happen.

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Simplified Collision Handling for Castouts

      Castouts (writes that shift cache lines from modified to
the shared or invalid states) can collide with other operations in a
number of ways.  They can also encounter resource problems with the
directory, and logic to handle all these possible problems can get
complicated.  This logic can be simplified by not updating the
directory when certain resource conflicts happen.

      As shown in the Figure, a distributed shared memory system
consists of Nodes (10, 20, 40, 50, 60) connected by an interconnect
network 30.  Each Node consists of Memory (11,21), Processors (12,
13, 22, 23), and logic to support distributed shared memory (14, 24).
The distributed memory control logic also contains part of a global
directory used to track which nodes have copies of local memory.  For
example, Global Dir 15 tracks which cache lines of memory 11 are
cached by nodes  20, 40, 50, and 60 and in what state (shared or
exclusive).

      When a processor has a line cached and modified, it may (for a
variety of reasons) "castout" the line.  Castout meaning that the
processor is a) writing the modified data to memory, and b) giving up
ownership of the line.

      For example: If Processor 22 has a line from memory 11
modified and performs a castout, the following events happen:
  o  The Dist Memory Control 24 accepts the castout and
      forwards it to Dist Memory Control 14.
  o  Processor 22 marks the line in its...