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Testmode and Test Method for Noise Induced Testing

IP.com Disclosure Number: IPCOM000118014D
Publication Date: 2005-Mar-31
Document File: 2 page(s) / 67K

Publishing Venue

The IP.com Prior Art Database

Abstract

The core is the implementation of a test mode that enables an inverter and drives inverted address/ command/data signals on an address/command/data bus. The test mode avoids false rejects due to internal voltage trimming. The implementation uses neighboring lines which are used to shield the actual command/address/data lines. These lines are ordinarily permanently connected to ground. With the novel approach these lines are used to induce noise by supplying the inverted signal on the address/command/data lines.

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Testmode and Test Method for Noise Induced Testing

Klaus Nierle, Infineon Technologies North America Corp.

Martin Versen, Infineon Technologies AG

Richard Meyer, Infineon Technologies North America Corp.

Abstract

The core is the implementation of a test mode that enables an inverter and drives inverted address/ command/data signals on an address/command/data bus. The test mode avoids false rejects due to internal voltage trimming. The implementation uses neighboring lines which are used to shield the actual command/address/data lines. These lines are ordinarily permanently connected to ground. With the novel approach these lines are used to induce noise by supplying the inverted signal on the address/command/data lines.

Description of Invention

The functionality of DRAM components is guaranteed by test during production. Only if these tests have a positive result, the parts will be delivered to customers. The test contents refer to the functionality in respect of the specification and a certain guard band in different parametric directions like voltage, temperature and operating frequency, because the functionality should be also guaranteed, if the specification is violated for a short time.

A test consists of a certain sequence of commands, addresses and data with that lead to fail conditions. Unfortunately, parametric timing and voltage deviations induced by noise cannot be controlled reliably. With existing test concepts it is very complex and expensive to test for noise induced functional marginalities.

Test sequences are usually chosen by experience and by empiric results. A sequence for the test of a data bus consists of accesses that use the tested data bus with alternating data to induce the maximum coupling between neighboring data lines. The existing approach to test for the influence of noise is done by modifying the internal voltage of the DRAM. However, this approach may lead to false rejects.

The proposed test concept utilizes a...