Browse Prior Art Database

Chip Power Structure to Enhance Performance and Noise

IP.com Disclosure Number: IPCOM000118067D
Original Publication Date: 1996-Sep-01
Included in the Prior Art Database: 2005-Mar-31
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Rohn, M: AUTHOR [+3]

Abstract

Current and future chip technology has advanced in density and line-to-line spacing. The effect of this is to increase capacitive coupling of wires to adjacent wiring on the same metal layer relative to capacitance coupling of wires to wiring planes above them or beneath them.

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Chip Power Structure to Enhance Performance and Noise

      Current and future chip technology has advanced in density and
line-to-line spacing.  The effect of this is to increase capacitive
coupling of wires to adjacent wiring on the same metal layer relative
to capacitance coupling of wires to wiring planes above them or
beneath them.

      In Application Specific Integrated Circuits (ASICs) or to a
somewhat lesser degree in microprocessors, the preponderance of
wiring on each level runs in one direction (i.e., north/south or
east/west).  Alternating wiring planes have power, ground, and
signals running orthogonal to that of the wiring plane above and
below.

      Current chip images have wide power and ground busses that are
widely separated on each level.  Between these busses are a large
number of signal lines.

      Two main problems arise with this layout as horizontal
geometries shrink:  Line to line capacitive coupling can cause enough
of a voltage change on a "quiet" line to be interpreted as an
incorrect level.  This is especially true when dynamic logic with
precharged nodes are used.  A precharged line can be coupled down and
can never recover.  Secondly, Delay integrity is seriously
compromised.  When the bulk of a wire's capacitance is to adjacent
lines that are switching,  the apparent capacitance can be much lower
(if the adjacent lines are switching in the same direction) or the
apparent capacitance can be much  higher (if the...