Browse Prior Art Database

High Speed Interface Between Graphic Chip on Note-Personal Computer and Column Driver on Flat Panel Display

IP.com Disclosure Number: IPCOM000118130D
Original Publication Date: 1996-Oct-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 4 page(s) / 89K

Publishing Venue

IBM

Related People

Kimura, Y: AUTHOR [+2]

Abstract

Disclosed is a method by which using its interface, a notebook system can reduce Electromagnetic Interference (EMI) noise with no buffer on the circuit of Flat Panel Display.

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This is the abbreviated version, containing approximately 100% of the total text.

High Speed Interface Between Graphic Chip on Note-Personal Computer
and Column Driver on Flat Panel Display

      Disclosed is a method by which using its interface, a notebook
system can reduce Electromagnetic Interference (EMI) noise with no
buffer on the circuit of Flat Panel Display.

      Fig. 1 shows a block diagram of High Speed Interface between
Graphic Chip on note-Personal Computer (PC) and Column driver on Flat
Panel Display.  The structure of this interface has one Parallel to
Serial (P/S) chip which has Low Voltage Differential Signaling (LVDS)
outputs, some Serial to Parallel (S/P) Column Drivers which have LVDS
interface and six resisters for termination (Fig. 2).

      S/P chip transfers 18 datas (R0-R5,G0-G5,B0-B5), HSYNC, VSYNC
and DISPT.  S/P chip converts parallel to serial by four times
frequency.  Serialized data is mapped as shown in Fig. 3.  Then,
Serialized data is transferred to LVDS level.  P/S Column driver
translates serial data into parallel by one fourths frequency.  When
serial to parallel, rising and falling edges of DCLK are used.

      To determine Tcycle, LVDS4 is defined as follows: When DISPT
is low (disable), B1 and B0 must be low.  Then, LVDS4 repeats low,
low, low, high.  During DISPT is low, Tcycle is found by LVDS4 (low,
low, low, high).  During DISPT is high, Tcycle is found by ring
counter which  is synchronized with LVDS4 (low, low, low, high).