Browse Prior Art Database

Method for Protection Against Erroneous Input/Output Writes

IP.com Disclosure Number: IPCOM000118139D
Original Publication Date: 1996-Oct-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Holland, WH: AUTHOR [+5]

Abstract

Disclosed is a method of protecting an Input/Output (I/O) register against erroneous write operations. It circumvents a prevalent bug in IBM compatible computer systems that can cause a single processor I/O write instruction to result in two identical I/O write cycles being generated on the computer's system bus.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 83% of the total text.

Method for Protection Against Erroneous Input/Output Writes

      Disclosed is a method of protecting an Input/Output (I/O)
register against erroneous write operations.  It circumvents a
prevalent bug in IBM compatible computer systems that can cause a
single processor I/O write instruction to result in two identical I/O
write cycles being generated on the computer's system bus.

      A hardware interlocking I/O write mechanism has been
implemented such that an auto variable-incrementing register will
perform its function only if there is a toggle of a specific data bit
each time the register is written.  An auto variable-incrementing
register is defined as a register which, when written, adds the
contents of the write data to the data that is already present in the
register.  The auto variable-incrementing registers are defined to be
16 data bits wide.  However, only the low order 8 bits are added to
the current contents of the register when it is written.  This allows
for the construction of the interlock mechanism with the use of an
unused upper data bit.  This bit is called the 'toggle' bit.

      After reset, an internal latch is set to enable writing of the
auto variable-incrementing register.  At this point only a write with
the toggle bit equal to zero will be accepted.  After this write,
only a write with the toggle bit equal to a one will be accepted.
Writes to  the register must continue to have the toggle bit
alternate between zero  and o...