Browse Prior Art Database

Early Indication of Packet Control Information

IP.com Disclosure Number: IPCOM000118241D
Original Publication Date: 1996-Nov-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 89K

Publishing Venue

IBM

Related People

Casper, DF: AUTHOR [+5]

Abstract

Disclosed is a method for communicating control information across a communications link. Specifically, the control information is indicated a fixed time or clock interval before the event being designated is transmitted. This allows pipelining to be used more efficiently in the implementation of the link.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Early Indication of Packet Control Information

      Disclosed is a method for communicating control information
across a communications link.  Specifically, the control information
is indicated a fixed time or clock interval before the event being
designated is transmitted.  This allows pipelining to be used more
efficiently in the implementation of the link.

      When a packet is sent over a parallel data link, typically
there is a separate control line that indicates significant control
events.  Instead of the transmitting port indicating the start of the
packet signal at the exact packet start, the packet control signal
can be asserted a fixed number of clock cycles before the actual
start of the packet.  This allows the potential for sending back to
back packets without idles in between packets.

      A link that embodies the disclosed method consists of eight
parallel data lines, a control line and a clock line.  The clock
alternates between high and low levels.  For each different clock
level, eight new bits of data are sent on the eight data lines.  The
eight data bits are grouped with three other sets of eight data bits
to form a 32 bit word.  The link is typically paired with a similar
link that transfers data in the opposite direction.

      The 32 bit words are grouped together to form packets, with a
format consisting of the major fields of Header, Data and Cyclic
Redundancy Check (CRC).  Packets may optionally be separated by
Idles.  A packet is used to transfer a block of data, and includes a
header field to designate the source address, the destination address
and the operation code that is associated with the data.  The packet
also includes a CRC field, which is used to ensure the integrity of
the packet data transferred across the link.  The CRC is always a
single 32 bit field.

      Control codes are transferred with the data on the control
line, and are used to indicate the start of 32 bit words and the type
of packet fields that are transferred.  Each control code is four
bits long and associated with the different packet fields: 0000 for
Idles, 1111 for Header (Hdr), 0011 for Data, and 1000 for CRC.  The
four bits of control codes are transferred serially across the link,
with the left-most bit being transferred first.  For example, for a
control code of 1000, first a "1"...