Browse Prior Art Database

Hierarchical T-Junction Support for Package Design

IP.com Disclosure Number: IPCOM000118284D
Original Publication Date: 1996-Dec-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 97K

Publishing Venue

IBM

Related People

Basile, JE: AUTHOR [+5]

Abstract

Disclosed is a method for supporting junction connections with greater than two wires at any point in space in Computer Aided Design (CAD) tools. This method allows for easy data modeling for logical verification, electrical verification, physical verification and timing analysis.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Hierarchical T-Junction Support for Package Design

      Disclosed is a method for supporting junction connections with
greater than two wires at any point in space in Computer Aided Design
(CAD) tools.  This method allows for easy data modeling for logical
verification, electrical verification, physical verification and
timing analysis.

      The problem is that no known existing package design Electronic
Design Automation (EDA) applications for high-end design provide full
logical, physical, and electrical support for physical wiring that
uses T-junctions.  T-Junctions are physical connections between
wiring segments at locations other than wire segment end points
and/or component/package physical pins.

      Due to this limitation in EDA package design applications,
wiring tools have to be overly constrained to prohibit the use of
T-junctions.  This results in more total wiring on the package,
longer implementation time (consumes more design services' resource
for manual wiring) and cost (more CPU time) and poorer product
performance (due to increased delay time on longer wires).

      The solution requires an innovative overall data structure, in
which wiring data and pin data are separate data structures.
Formerly, wiring data and pin data were defined as one structure
where each wire  can only be accessed through a specific pin.  This
new data structure will be used by new package design applications.
These applications will include an automatic process for wiring data
feedback when the wiring data contains the addition of T-junctions.

      A new, physical point record is defined to represent
T-junctions and also to replace component and package Input/Output
(I/O) physical pin records.  A T-junction may or may not be a point
at an allowable (by technology ground rules) via punch location.  A
via is a Z directional wire location.  Previously, only physical pins
were represented in the data model.  In the proposed data model,
physical point records may represent any point at which wiring
connections are allowed.

A physical point record will include, but not be limited to, the
following data fields:
  1.  three dimensional location of physical point (x,y,z)
  2.  pointers to previous and next point records
  3.  pointers to each wire segment emanating, terminating or
       passing through this point, including via wires
  4.  for each pointer to a wire segment, there will be a field
       specifying whether this wire segment emanates or terminates
       at this point

The pointers are required to allow hierarchical package design
application utilities to build a net model containing all pins,
T-junctions and wire segments, including those that cross physical
package boundaries.  This is necessary to support fan-in and fan-out
at a...