Browse Prior Art Database

Access List Entry Token Resolution Method

IP.com Disclosure Number: IPCOM000118309D
Original Publication Date: 1996-Dec-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 81K

Publishing Venue

IBM

Related People

Mueller, MJ: AUTHOR

Abstract

The Access List Entry Token Resolution Method (ALET R/M) is a hardware feature which provides a performance improvement in an ESA/390* environment that uses Access Registers (ARs).

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 53% of the total text.

Access List Entry Token Resolution Method

      The Access List Entry Token Resolution Method (ALET R/M) is a
hardware feature which provides a performance improvement in an
ESA/390* environment that uses Access Registers (ARs).

      The function of the ALET R/M is to reduce or eliminate purges
made to any form of AR Translation Lookaside Buffer (ALB) or any
other tracking mechanism due to the reuse or reloading of an AR or an
ALET.  The performance improvement results from the machine cycles
saved in not having to perform an unnecessary AR translation.

Mechanisms of the improvements:
  1.  For each AR load: a detection mechanism to prevent purging
       of existing information if the load is redundant.
  2.  For each AR to be loaded with a 'special' ALET (an ALET
       pointing to a designated address space, i.e., an
       architecturally defined mappings between ALET values and
       address spaces such as Primary, Secondary, etc.): a
       detection mechanism to recognize the special ALET and
       resolve the ALET by using the known parameters of the
       architected Address space.
  3.  For each ALET which has been previously translated: If
       found in the ALB or any other form of tracking mechanism,
       then use those parameters to provide the resolution of
       the ALET.  This information is used to update any form of
       ALB that is used to manage address spaces.
  4.  The ability to perform the above (1, 2, and 3) in a
       pipelined fashion, achieving an AR Load rate of 1/cycle.

Implementation of the ALET R/M:
  1.  Redundant load detector
        At LOAD AR time, the ALET to be loaded is compared with
         the ALET previously stored and now contained in the
         particular AR.  Normally, the new value would warrant
         discarding any association with the old value.  However,
         since a redundant load is possible, the current state
         of the AR's validity should not be modified.  Therefore,
         if the load is redundant and its translation is valid,
         then its current state will not be modified in any ALB
         or other table used to track and manage AR/ALETs.
  2.  Special ALET detector
        At LOAD AR time, the ALET to be loaded is compared
         with ALETs of value '00000000'x and '00000001'x.  These
         values represent primary and secondary ALETs, respectively,
         which point to primary and secondary Control Registers
         (CRs).  This also applies to any address space that is
         defined to have either a known ALET value or one that can
         be found...