Browse Prior Art Database

Methodology for Software Peripheral Component Interconnect Frequency Selection

IP.com Disclosure Number: IPCOM000118384D
Original Publication Date: 1997-Jan-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 45K

Publishing Venue

IBM

Related People

Arroyo, RX: AUTHOR [+3]

Abstract

Disclosed is a method for Initial Program Load (IPL) firmware to select the operational frequency of a high speed Peripheral Component Interconnect (PCI) bus. This is particularly useful for systems that desire to use adapters capable of running faster than 33 Mhz but less than 66 Mhz.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 66% of the total text.

Methodology for Software Peripheral Component Interconnect Frequency
Selection

      Disclosed is a method for Initial Program Load (IPL) firmware
to select the operational frequency of a high speed Peripheral
Component Interconnect (PCI) bus.  This is particularly useful for
systems that desire to use adapters capable of running faster than 33
Mhz but less than 66 Mhz.

      The method described in this disclosure requires two hardware
facilities to provide IPL firmware with the means to:
  1.  Reset the target PCI bus domain without resetting any other
       system device.
  2.  Change the frequency of the clock provided to the PCI bus.

      The implementation of these two hardware requirements are
easily accomplished by anyone skilled in the art.  A typical approach
would be to provide firmware an I/O address to control these items.

      The following steps illustrate the methodology that IPL
firmware uses in configuring the PCI bus frequency:
  1.  At power on reset, clock circuitry runs the PCI bus at
       33 Mhz.
  2.  Firmware configures the PCI host bridge and then issues
       PCI Config read cycles to the PCI STATUS register of all
       adapters present on the bus.  If all adapters indicate
       that they are 66 mhz capable (PCI STATUS Register - Bit 5),
       then go to step 5.
  3.  For the adapters that are not 66 mhz capable, firmware
       issues a PCI Config read to the PCI...