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Improved Charge Pump and Damping Circuit for Phase Locked Loop

IP.com Disclosure Number: IPCOM000118619D
Original Publication Date: 1997-Apr-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 4 page(s) / 77K

Publishing Venue

IBM

Related People

Smith III, GE: AUTHOR

Abstract

Disclosed is a method for generating a bi-directional current pulse. The pulse is proportional to the input pulse widths from control circuits.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Improved Charge Pump and Damping Circuit for Phase Locked Loop

      Disclosed is a method for generating a bi-directional current
pulse.  The pulse is proportional to the input pulse widths from
control circuits.

      Fig. 1 shows an overall block diagram of this circuit.  The
primary inputs are INC, INCN, DEC, and DECN.  INC and INCN are
different phases of the same signal, as are DEC and DECN.  These
signals are pulse  width modulated by a control signal.  They always
have full swing but get  narrower as smaller changes have to be
applied.

      The outputs FILT and FILTN are differential outputs going to
other circuitry.  Charge proportional to the control signal is pumped
into these outputs.  Output VIIO gets a charge that is proportional
to the difference of the FILT and FILTN outputs.

      The block labeled DAMP_ISC is shown in Fig. 2.  It provides a
constant current that is removed from the VIIO node.  It uses a
current mirror to isolate a reference current from the bias circuit,
which generates all reference voltages and currents from a single
reference value, ensuring tracking.

      The blocks labeled DAMP_INC, DAMP_DEC, CP_FILT, and CP_FILTN
are all instances of the circuit shown in Fig. 3.  This circuit will
supply current when the TRUE input is low and the FALSE input is
high.  These two inputs are always out of phase.  The amount of
current is controlled by the two transistors labeled P_MIRROR and
N_MIRROR, which are part of a current mirror (the rest in in the BIAS
block).  When the current source is off, the gate of transistor P_OUT
is held to the power supply by transistors P_KILL and N_KILL.  Both
types of transistors are used, with identical sizes, to cancel the
switching noise on their gates.  When the kill transistors are turned
off, the gate of P_OUT is slowly brought down by the current
generated by N_MIRROR.  To increase the speed of the...