Browse Prior Art Database

Improved Packaging for Neuronal Chips

IP.com Disclosure Number: IPCOM000118689D
Original Publication Date: 1997-May-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 4 page(s) / 210K

Publishing Venue

IBM

Related People

Emsallem, J: AUTHOR [+2]

Abstract

The ZISC036* chip which incorporates 36 neurons has been designed for recognition and classification applications which generally require super-computers. ZISC036 chips provide a very cost-effective way to solve such problems with sufficient performance to match real time constraints. The performance level achieved by ZISC036 chips makes them suitable for real-time applications such as video and signal processing. The density of ZISC036 connections would normally require the use of 8 layer cards, making its packaging very expensive. Moreover, the functional tests before delivery show the weakness of very intensive soldering at 50 mil spaced pins. These weaknesses have led to the proposition of a combination mother/daughter card which will bring real benefits to the users.

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Improved Packaging for Neuronal Chips

      The ZISC036* chip which incorporates 36 neurons has been
designed for recognition and classification applications which
generally require super-computers.  ZISC036 chips provide a very
cost-effective way to solve such problems with sufficient performance
to match real time constraints.  The performance level achieved by
ZISC036 chips makes  them suitable for real-time applications such as
video and signal processing.  The density of ZISC036 connections
would normally require  the use of 8 layer cards, making its
packaging very expensive. Moreover,  the functional tests before
delivery show the weakness of very intensive  soldering at 50 mil
spaced pins.  These weaknesses have led to the proposition of a
combination mother/daughter card which will bring real  benefits to
the users.

      This disclosure provides a daughter card with SIMM's standard
(SIZM), including 6 ZISC modules (of the single chip type) on two
faces (Fig.  1), combined with a mother card (Fig. 2), which
implements the PCI  logic interface, the ZISC036 chips control logic
and connectors for daughter cards at SIMM's standard, including 6
ZISC036 modules on two faces.

The proposed packaging has some definite advantages:
  1.  an increase of the ZISC module amount on one mother card
       because the use of the connector with the daughter card
       increases the number of neurons on the mother card.
  2.  the reliability of the combi...