Browse Prior Art Database

Sharing a Single Request/Grant Pair among Peripheral Component Interconnect Devices

IP.com Disclosure Number: IPCOM000118717D
Original Publication Date: 1997-May-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 4 page(s) / 92K

Publishing Venue

IBM

Related People

Ackerman, J: AUTHOR

Abstract

Disclosed is a method allowing multiple Peripheral Component Interconnect (PCI) devices to share a common request/grant signal pair without the use of an additional logic, such as an extra arbiter.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 52% of the total text.

Sharing a Single Request/Grant Pair among Peripheral Component Interconnect
Devices

      Disclosed is a method allowing multiple Peripheral Component
Interconnect (PCI) devices to share a common request/grant signal
pair without the use of an additional logic, such as an extra
arbiter.

      Fig. 1 is a schematic view showing the interconnection of a
number of PCI devices (10), according to this method.  A Multi-Master
In (MMI) and a Multi-Master Out (MMO) signal are added to each PCI
device, with the MMO and MMI connections to adjacent devices being
connected.  The MMO connection of the last device is connected to the
MMI connection of the first device, forming a loop.  When the MMI
signal of an individual PCI device is active, the device "owns the
request," so it can request the PCI bus (12).  When the device owns
the request but does not need to request the bus, it activates its
MMO signal, allowing the next PCI device to own the request.

      Fig. 2 is a schematic view of a state machine used to control
the MMO signal and the tri-state enable for a Request (REQ) signal.
In the reset state (14), MMO is inactive and REQ  is tri-stated.
This state is entered when the PCI RST  signal is active.  From this
state (14): when RST, go to reset; else go to waitEnable.  In the
waitEnable state (16), MMO is inactive and REQ  is enabled but driven
inactive.  This state meets the PCI specification if there is only
one device attached to the request/grant pair.  The internal Bus
Master Enable (BME) bit (bit (2) of the PCI Command Register) is used
to determine which device will initiate the MMO signal.  From this
state (16): when BME, go to onlyOr1st (Only the first device has its
BME bit set to take this path.); else when MMI, go to nextDevice;
else go to wait Enable.  In the nextDevice state (18), MMO is driven
active to pass control to the next device and REQ  is tri-stated.
From this state...