Browse Prior Art Database

Concurrent Central Processor Patch Apply

IP.com Disclosure Number: IPCOM000118729D
Original Publication Date: 1997-Jun-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 43K

Publishing Venue

IBM

Related People

Davies, S: AUTHOR [+3]

Abstract

Disclosed is a method to apply a new load (level) of Central Processor (CP) microcode while the customer's system is running. This is performed by having two levels (old and new) of microcode and varying the CP's offline and then back online to activate the new level of microcode.

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This is the abbreviated version, containing approximately 68% of the total text.

Concurrent Central Processor Patch Apply

      Disclosed is a method to apply a new load (level) of Central
Processor (CP) microcode while the customer's system is running.
This is performed by having two levels (old and new) of microcode and
varying the CP's offline and then back online to activate the new
level of microcode.

      The ability to load new microcode without halting the operation
of a system is frequently required in today's computing environments.
Most systems require all microcode to be at the same engineering
change level and one CP cannot be stopped or paused for any length of
time without causing software to timeout or ABEND.

      In this design, where there are multiple processors in the
system, it is necessary only to take one processor, at a time, out of
the configuration.  The procedure to do this is performed by using
the 'Vary CP offline' command.  This command is issued by the
operator to the software running at the time, such as MVS or VM.
(Note: this design  is also applicable in an Logical Partition (LPAR)
environment.)

      A new level of microcode is loaded into the system from the
Processor Controller, while in patch mode, prior to issuing the vary
off command.  Once the CP is offline, pointers are set up for that CP
to point to the new load of microcode.  These pointers are maintained
by the Processor Controller and given to the CP hardware or
microcode.

      The operator can then 'Vary on' the CP, per instr...