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Automatic Multiple Concurrent Package Skew Minimization Algorithm

IP.com Disclosure Number: IPCOM000118798D
Original Publication Date: 1997-Jul-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 4 page(s) / 218K

Publishing Venue

IBM

Related People

Granato, MA: AUTHOR [+5]

Abstract

Disclosed is an algorithm which automatically minimizes skew across multiple packages for any selected set of nets. Skew is the difference in time between the earliest and latest signal's arrival time within a group or bundle of nets.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 23% of the total text.

Automatic Multiple Concurrent Package Skew Minimization Algorithm

      Disclosed is an algorithm which automatically minimizes skew
across multiple packages for any selected set of nets.  Skew is the
difference in time between the earliest and latest signal's arrival
time within a group or bundle of nets.

      Skew is a problem under many circumstances; clock skew and data
bus skew are two examples.  Skew can cause improper clock latch
times, as well as lost data bits, in the worst case scenario.  This
invention provides a method for quickly and easily removing skew, or
de-skewing, a selectable set of nets across single or multiple
packages concurrently.

      This algorithm is designed to minimize skew for any selected
set of nets.  The designer will select from any set of nets via an
existing set of SHUFFLE Net Grouping functions (SHUFFLE is a
packaging design system used for modules, cards, boards, cables and
chips). These  grouping functions will allow selection of individual
nets or sets of nets by any specified similar characteristic(s).

      Prior to the invocation of this algorithm, initial minimum and
maximum wire lengths are assigned to each net.  These minimum and
maximum wire lengths have been determined in association with the
specific delay  predictor scenario for that specific net type.  This
length window insures the validity of the delay predictor process
within a defined tolerance.

      The object of this algorithm is to narrow the above described
wiring window, based on each specific net's characteristics to ensure
that skew is minimized to a target level.  This algorithm may be run
prior to detailed Physical Design (PD) based on pre-PD physical
estimates provided by the SHUFFLE Design System, as well as after
detailed PD. The  pre-PD run is optional but helpful.

      This algorithm is based on system timing slack (the difference
between the required arrival time and the actual arrival time)
feedback, so it will be package independent.  Using slacks will also
allow this function to work across multiple packages.

      The output of this algorithm will be a set of minimum and
maximum wire length constraints to be fed to PD.  With the
application of these constraints, wiring will ensure that skew is
minimized. This  data is passed to PD via an interface file
specifying the from-to connections with minimum and maximum wire
lengths.

      Prior to beginning the de-skewing process, all nets should be
made as fast as possible with emphasis on the slowest nets on the
package.  Nets with the worst slacks on the package should be
optimized by all available means.  More optimized chip and package
Input/Output (I/O) assignment should be considered to improve both
capacitive load and total transmission line length.  Resistive
termination and faster drivers should also be considered as options.
All standard techniques  for improving net delay should be
incorporated to improve...