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WSix Notching and Undercutting Reduction during the Gate Conductors Formation in Course of the Insulated Gate Field Effect Transistors Fabrication Process

IP.com Disclosure Number: IPCOM000119143D
Original Publication Date: 1997-Dec-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 48K

Publishing Venue

IBM

Related People

Costaganna, P: AUTHOR

Abstract

Implementation of new reactor designs to improve tool uptime, maintenance intervention, and to optimize grounding to eliminate arcing problems has shown a great impact at the Gate Conductors (GC) etching step which defines the gates of Insulated Gate Field Effect Transistors (IGFETs), typically in DRAM products. This step is critical due to very small line dimensions and then requires straight profiles without any damage, such as notching and undercutting of the WSix layer which is an essential component of the gate conductor.

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WSix Notching and Undercutting Reduction during the Gate Conductors
Formation in Course of the Insulated Gate Field Effect Transistors
Fabrication Process

      Implementation of new reactor designs to improve tool uptime,
maintenance intervention, and to optimize grounding to eliminate
arcing problems has shown a great impact at the Gate Conductors (GC)
etching step which defines the gates of Insulated Gate Field Effect
Transistors (IGFETs), typically in DRAM products.  This step is
critical due to very small line dimensions and then requires straight
profiles without any damage, such as notching and undercutting of the
WSix layer which is an essential component of the gate conductor.

      In addition, DRAM product integration requires reducing of
groundrules which, in turn, results in critical dimensions for word
lines in the nested areas with a low pitch which is difficult to
control because of micro loading effects.

      This problem, referred to as "WSix notching", affects not only
the nested areas but also the edge of the wafer.  WSix notching
occurs during the WSix layer etching but this effect is amplified
later on in  the process during the etching of the polysilicon layer
which is another  component of the gate conductor.

      It has been discovered that adequate protection of the gate
conductor during WSix etching from lateral attack at this stage of
the process requires an excellent passivation because the WSix:
polysilicon selectively...