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Josephson Device Logic Circuits

IP.com Disclosure Number: IPCOM000119275D
Original Publication Date: 1991-Jan-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 3 page(s) / 59K

Publishing Venue

IBM

Related People

Faris, SM: AUTHOR

Abstract

In Josephson technology, the use of interferometers to provide various circuit functions is known. However, the ability to miniaturize these circuits is limited by flux quantum constraints, and the interferometers themselves are susceptible to the presence of trapped flux. The circuits shown here use a combination of Josephson devices and resistors to achieve non-linearities, and therefore to provide logic circuit arrangements. The critical currents of the two Josephson devices are different so that one will switch before the other, but the simultaneous presence of two inputs is required to give an output.

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Josephson Device Logic Circuits

      In Josephson technology, the use of interferometers to
provide various circuit functions is known.  However, the ability to
miniaturize these circuits is limited by flux quantum constraints,
and the interferometers themselves are susceptible to the presence of
trapped flux.  The circuits shown here use a combination of Josephson
devices and resistors to achieve non-linearities, and therefore to
provide logic circuit arrangements.  The critical currents of the two
Josephson devices are different so that one will switch before the
other, but the simultaneous presence of two inputs is required to
give an output.

      The basic circuit is shown in Fig. 1A, while Fig. 1B is a
schematic representation of that circuit.  Fig. 1C is the threshold
curve for the circuit where n = 2.

      Input A is injected into node 10 and is used to switch junction
J1.  Input B divides and flows in both halves of loop 12 in
accordance with the resistors R and nR.  When J1 switches, input B
flows entirely in J2, thereby causing it to switch and providing an
output A.B.

      Fig. 2A is a circuit arrangement based on the circuit of Fig.
1A, which achieves a symmetric threshold and improved margins, as
illustrated in Fig. 2C.  The device is schematically represented in
Fig.  2B.  This circuit also provides an AND function.

      The circuit of Fig. 3 combines both multi-fan-in and
multi-fan-out capability.  It uses the symmetric...