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Sixty-Four-Byte Latency Dynamic Dma Transfers

IP.com Disclosure Number: IPCOM000119282D
Original Publication Date: 1991-Jan-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 56K

Publishing Venue

IBM

Related People

Chisholm, DR: AUTHOR [+2]

Abstract

This article describes a technique for use in a computer system to monitor direct memory access (DMA) transfer times along with bytes that are available for transfer to give the best possible time on a MICRO CHANNEL* (MC) bus.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 59% of the total text.

Sixty-Four-Byte Latency Dynamic Dma Transfers

      This article describes a technique for use in a computer
system to monitor direct memory access (DMA) transfer times along
with bytes that are available for transfer to give the best possible
time on a MICRO CHANNEL* (MC) bus.

      In an interface chip having two 32-byte buffers which are used
for DMA operations, the DMA controller allows these buffers to be
used in three different ways on the MC as follows:
1)   Two separate 32-byte buffers
2)   One 64-byte buffer
3)   Two separate 32-byte buffers but allow 64-byte latency mode
transfers.
The 64BYTE latency mode description is as follows:

      MICROPROCESSOR (MP) TO MC TRANSFER In the interface chip on a
MP to MC transfer, a MP side DMA will involve filling of the buffers
and a MC side DMA will involve emptying these buffers.  Upon filling
one of these buffers, the interface chip DMA controller (DMAC) will
issue a request that will cause a PREEMPT to be generated. At the
same time the PREEMPT is issued, if the other buffer is empty, the
DMAC will continue to fill it.  This filling operation will continue
until the interface chip has been granted the MC or the other buffer
is full.  If the interface chip is granted the MC, the filling
operation is stopped and the first buffer is emptied on the MC.  If
both buffers are full, the DMAC will wait until the interface chip
has been granted the MC.  When the interface chip has been granted
the MC and bo...