Browse Prior Art Database

Method to View Multiprocessor Instruction Execution As Sequential Instruction Execution

IP.com Disclosure Number: IPCOM000119332D
Original Publication Date: 1991-Jan-01
Included in the Prior Art Database: 2005-Apr-01
Document File: 2 page(s) / 69K

Publishing Venue

IBM

Related People

Barrett, KL: AUTHOR [+2]

Abstract

From a programming (architectural) point of view, a processor complex is a black box that takes an assembly language program as input and delivers a set of new architected values as output. The external behavior of the processor's execution of a program can be viewed by the programmer as a series of sequential assembly language instruction executions. When programming, considering functional capability and neglecting performance issues, a processor complex can be considered a sequential machine - one instruction is executed, and an architected register(s) is updated; then the next instruction is executed, and an architected register(s) is updated; this continues until all instructions are executed. Thus, the architected registers change in sequential order with respect to the program.

This text was extracted from an ASCII text file.
This is the abbreviated version, containing approximately 58% of the total text.

Method to View Multiprocessor Instruction Execution As Sequential
Instruction Execution

      From a programming (architectural) point of view, a
processor complex is a black box that takes an assembly language
program as input and delivers a set of new architected values as
output.  The external behavior of the processor's execution of a
program can be viewed by the programmer as a series of sequential
assembly language instruction executions.  When programming,
considering functional capability and neglecting performance issues,
a processor complex can be considered a sequential machine - one
instruction is executed, and an architected register(s) is updated;
then the next instruction is executed, and an architected register(s)
is updated; this continues until all instructions are executed.
Thus, the architected registers change in sequential order with
respect to the program.

      When debugging a simple, sequential processor (to determine
where/why an assembly language program failed), one can take
advantage of its sequential behavior to readily find the architected
register where the error first occurred and what instruction was
being executed when it occurred. When debugging a multiprocessor
complex though, the processor complex cannot be viewed as a single
sequential execution unit.  Because of parallel processors, a
sequential program may not execute serially (i.e., a fixed point
processor and a floating point processor may update architected
registers...